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RM0352 bảng dữ liệu(PDF) 13 Page - STMicroelectronics

tên linh kiện RM0352
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
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RM0352 bảng dữ liệu(HTML) 13 Page - STMicroelectronics

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RM0352
System and memory overview
137
2.2
Memory organization
Introduction
Program memory, data memory, registers and I/O ports are organized within the same linear
4-Gbyte address space.
The bytes are coded in memory in Little Endian format. The lowest numbered byte in a word
is considered the word's least significant byte and the highest numbered byte the most
significant.
The addressable memory space is divided into 16 main blocks, each of 256 MB. All the
memory areas that are not allocated to on-chip memories and peripherals are considered
“RESERVED”.
For the detailed mapping of an available memory and register areas, please refer to the
memory map in
Table 2 and to the register lists detailed in each of the peripheral sections
(
Table 5 on page 20 in Section 4: GPIO to Table 114 on page 119 in Section 12: UART
(universal asynchronous receive transmit)).



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