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RM0352 bảng dữ liệu(PDF) 61 Page - STMicroelectronics

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RM0352
ARM© dual timer module (SP804)
137
Control register, TimerXControl
The bit assignments of the control register are listed in
Table 53.
Caution:
The counter mode, size or prescale settings must not be changed while the Timer module is
running. If a new configuration is required then the Timer module must be disabled and then
the new configuration values written to the appropriate registers. The Timer module must
then be re-enabled after the configuration changes are complete. Failure to follow this
procedure can result in unpredictable behavior of the device.
Interrupt clear register. TimerXIntClr
Any write to this register, clears the interrupt output from the counter.
Table 53. Control register bit assignments
Bits
Name
Type
Function
[31:8]
-
-
RESERVED bits, do not modify, and ignore on read
[7]
TimerEn
Read/write
Enable bit:
0 = timer module disabled (default)
1 = timer module enabled.
[6]
TimerMode
Read/write
Mode bit:
0 = timer module is in free running mode (default)
1 = Timer module is in periodic mode.
[5]
IntEnable
Read/write
Interrupt Enable bit:
0 = timer module Interrupt disabled
1 = timer module Interrupt enabled (default).
[4]
-
-
RESERVED bit, do not modify, and ignore on read
[3:2]
TimerPre
Read/write
Prescale bits:
00 = 0 stages of prescale, clock is divided by 1 (default)
01 = 4 stages of prescale, clock is divided by 16
10 = 8 stages of prescale, clock is divided by 256
11 = Undefined, do not use.
[1]
TimerSize
Read/write
Selects 16/32 bit counter operation:
0 = 16-bit counter (default)
1 = 32-bit counter.
[0]
OneShot
Read/write
Selects one-shot or wrapping counter mode:
0 = wrapping mode (default)
1 = one-shot mode.



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