RM0352 datasheet(91/138 Pages) STMICROELECTRONICS

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RM0352

I2C bus interface

137

0: Tx FIFO is not empty.

1: Tx FIFO is empty with the read-from-slave operation in progress.

[16] RFSR: read-from-slave request. RFSR is set when a read-from-slave “slave-

transmitter” request is received (I

C slave is addressed) from the I

C line. On

the assertion of this interrupt the Tx FIFO is flushed (pending data are

cleared) and the CPU shall put the data in the Tx FIFO. This bit is self-cleared

writing data in the FIFO. In case the FIFO is empty before the completion of

the read operation the I2C_RISR:RFSE interrupt bit is set.This interrupt is

cleared setting the related bit of the I2C_ICR register.

0: read-from-slave request has been served.

1: read-from-slave request is pending.

[15] LBR: length number of bytes received (SMBUS mode). LBR is set in case of

MR or WTS and when the number of bytes received is equal to the

transaction length programmed in the I2C_MCR:LENGTH (master mode) or

I2C_SMB_SCR:LENGTH (slave mode). On the assertion of this interrupt and

when the bit I2C_CR:FRC_STRTCH is set, the hardware starts clock

stretching, the CPU shall download the data byte (command code, Byte

count, data, etc.) from the Rx FIFO, reset the expected length of the

transaction in I2C_SMB_SCR:LENGTH and clear interrupt. When clearing

this interrupt the hardware continues transfer.This interrupt is cleared setting

the related bit of the I2C_ICR register.

0: length number of bytes is not received.

1: length number of bytes received.

[6] RXFF: Rx FIFO full. RXFF is set when a full condition occurs in the Rx FIFO

(only for debugging purpose). This bit is self cleared when the data are read

from the Rx FIFO.

0: Rx FIFO is not full.

1: Rx FIFO is full.

[5] RXFNF: Rx FIFO nearly full. RXFNF is set when the number of entries in the

Rx FIFO is greater or equal than the threshold value programmed in the

I2CRFTR:THRESHOLD_RX register. Its self cleared when the threshold

level is under the programmed threshold.

0: number of entries in the Rx FIFO less than the

I2CRFTR:THRESHOLD_RX register.

1: number of entries in the Rx FIFO greater or equal than the

I2CRFTR:THRESHOLD_RX register.

[4] RXFE: Rx FIFO empty. RXFE is set when the Rx FIFO is empty (only for

debugging purpose).

This bit is self cleared when the slave Rx FIFO is not empty.

0: Rx FIFO is not empty.

1: Rx FIFO is empty.

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