MC9S08DZ96F2CLL datasheet(250/458 Pages) FREESCALE

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Chapter 11 Inter-Integrated Circuit (S08IICV2)

MC9S08DZ128 Series Data Sheet, Rev. 1

250

Freescale Semiconductor

11.7

Initialization/Application Information

Figure 11-11. IIC Module Quick Start

Module Initialization (Slave)

Write: IICC2

—

to enable or disable general call

—

to select 10-bit or 7-bit addressing mode

Write: IICA

—

to set the slave address

Write: IICC1

—

to enable IIC and interrupts

Initialize RAM variables (IICEN = 1 and IICIE = 1) for transmit data

Initialize RAM variables used to achieve the routine shown in Figure 11-12

Module Initialization (Master)

Write: IICF

—

to set the IIC baud rate (example provided in this chapter)

Write: IICC1

—

to enable IIC and interrupts

Initialize RAM variables (IICEN = 1 and IICIE = 1) for transmit data

Initialize RAM variables used to achieve the routine shown in Figure 11-12

Write: IICC1

—

to enable TX

Write: IICC1

—

to enable MST (master mode)

Write: IICD

—

with the address of the target slave. (The lsb of this byte determines whether the communication is

master receive or transmit.)

Module Use

The routine shown in Figure 11-12 can handle both master and slave IIC operations. For slave operation, an

incoming IIC message that contains the proper address begins IIC communication. For master operation,

communication must be initiated by writing to the IICD register.

IICF

IICA

Baud rate = BUSCLK / (2 x MULT x (SCL DIVIDER))

TXAK

RSTA

IICC1

IICEN

IICIE

MST

Module conﬁguration

ARBL

SRW

IICIF

RXAK

IICS

TCF

IAAS

BUSY

Module status ﬂags

AD[7:1]

When addressed as a slave (in slave mode), the module responds to this address

MULT

ICR

IICD

DATA

Data register; Write to transmit IIC data read to read IIC data

AD10

AD9

AD8

IICC2 GCAEN

ADEXT

Address conﬁguration

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