MC9S08DZ96F2CLL datasheet(14/458 Pages) FREESCALE

14 / 458 page

MC9S08DZ128 Series Data Sheet, Rev. 1

Freescale Semiconductor

Section Number

Title

Page

10.6 Application Information .................................................................................................................229

10.6.1 External Pins and Routing ..............................................................................................229

10.6.2 Sources of Error ..............................................................................................................230

Chapter 11

Inter-Integrated Circuit (S08IICV2)

11.1 Introduction ....................................................................................................................................233

11.1.1 IIC1 Conﬁguration Information ......................................................................................233

11.1.2 Features ...........................................................................................................................235

11.1.3 Modes of Operation ........................................................................................................235

11.1.4 Block Diagram ................................................................................................................236

11.2 External Signal Description ...........................................................................................................236

11.2.1 SCL — Serial Clock Line ...............................................................................................236

11.2.2 SDA — Serial Data Line ................................................................................................236

11.3 Register Deﬁnition .........................................................................................................................236

11.3.1 IIC Address Register (IICxA) .........................................................................................237

11.3.2 IIC Frequency Divider Register (IICxF) .........................................................................237

11.3.3 IIC Control Register (IICxC1) ........................................................................................240

11.3.4 IIC Status Register (IICxS) .............................................................................................241

11.3.5 IIC Data I/O Register (IICxD) ........................................................................................242

11.3.6 IIC Control Register 2 (IICxC2) .....................................................................................242

11.4 Functional Description ...................................................................................................................243

11.4.1 IIC Protocol .....................................................................................................................243

11.4.2 10-bit Address .................................................................................................................247

11.4.3 General Call Address ......................................................................................................248

11.5 Resets .............................................................................................................................................248

11.6 Interrupts ........................................................................................................................................248

11.6.1 Byte Transfer Interrupt ....................................................................................................248

11.6.2 Address Detect Interrupt .................................................................................................248

11.6.3 Arbitration Lost Interrupt ................................................................................................248

11.7 Initialization/Application Information ...........................................................................................250

Chapter 12

Freescale’s Controller Area Network (S08MSCANV1)

12.1 Introduction ....................................................................................................................................253

12.1.1 Features ...........................................................................................................................255

12.1.2 Modes of Operation ........................................................................................................255

12.1.3 Block Diagram ................................................................................................................256

12.2 External Signal Description ...........................................................................................................256

12.2.1 RXCAN — CAN Receiver Input Pin .............................................................................256

12.2.2 TXCAN — CAN Transmitter Output Pin .....................................................................256

12.2.3 CAN System ...................................................................................................................256

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