MC9S08DZ96F2CLL datasheet(99/458 Pages) FREESCALE

99 / 458 page

Chapter 5 Resets, Interrupts, and General System Control

MC9S08DZ128 Series Data Sheet, Rev. 1

Freescale Semiconductor

5.8.7

System Power Management Status and Control 1 Register

(SPMSC1)

This high page register contains status and control bits to support the low-voltage detect function, and to

enable the bandage voltage reference for use by the ADC and ACMP modules. This register should be

written during the user’s reset initialization program to set the desired controls even if the desired settings

are the same as the reset settings.

Figure 5-9. System Power Management Status and Control 1 Register (SPMSC1)

76543210

LVWF1

1 LVWF will be set in the case when V

Supply transitions below the trip point or after reset and VSupply is already below VLVW.

LVWIE

LVDRE2

2 This bit can be written only one time after reset. Additional writes are ignored.

LVDSE

LVDE2

BGBE

LVWACK

Reset:

00011100

= Unimplemented or Reserved

Table 5-10. SPMSC1 Register Field Descriptions

Field

Description

LVWF

Low-Voltage Warning Flag — The LVWF bit indicates the low-voltage warning status.

0 low-voltage warning is not present.

1 low-voltage warning is present or was present.

LVWACK

Low-Voltage Warning Acknowledge — If LVWF = 1, a low-voltage condition has occurred. To acknowledge this

low-voltage warning, write 1 to LVWACK, which will automatically clear LVWF to 0 if the low-voltage warning is

no longer present.

LVWIE

Low-Voltage Warning Interrupt Enable — This bit enables hardware interrupt requests for LVWF.

0 Hardware interrupt disabled (use polling).

1 Request a hardware interrupt when LVWF = 1.

LVDRE

Low-Voltage Detect Reset Enable — This write-once bit enables LVD events to generate a hardware reset

(provided LVDE = 1).

0 LVD events do not generate hardware resets.

1 Force an MCU reset when an enabled low-voltage detect event occurs.

LVDSE

Low-Voltage Detect Stop Enable — Provided LVDE = 1, this read/write bit determines whether the low-voltage

detect function operates when the MCU is in stop mode.

0 Low-voltage detect disabled during stop mode.

1 Low-voltage detect enabled during stop mode.

LVDE

Low-Voltage Detect Enable — This write-once bit enables low-voltage detect logic and qualiﬁes the operation

of other bits in this register.

0 LVD logic disabled.

1 LVD logic enabled.

BGBE

Bandgap Buffer Enable — This bit enables an internal buffer for the bandgap voltage reference for use by the

ADC and ACMP modules on one of its internal channels.

0 Bandgap buffer disabled.

1 Bandgap buffer enabled.

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