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PSD4235G2V-10UI bảng dữ liệu(PDF) 45 Page - STMicroelectronics |
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PSD4235G2V-10UI bảng dữ liệu(HTML) 45 Page - STMicroelectronics |
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45 / 100 page ![]() 45/100 PSD4256G6V This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. Input Macrocells (IMC) The CPLD has 24 Input Macrocells (IMC), one for each pin on Ports A, B, and C. The architecture of the Input Macrocells (IMC) is shown in Figure 16. The Input Macrocells (IMC) are individually config- urable, and can be used as a latch, register, or to pass incoming Port signals prior to driving them onto the PLD input bus. The outputs of the Input Macrocells (IMC) can be read by the MCU through the internal data bus. The enable for the latch and clock for the register are driven by a multiplexer whose inputs are a product term from the CPLD AND Array or the MCU Address Strobe (ALE/AS). Each product term output is used to latch or clock four Input Macrocells (IMC). Port inputs 3-0 can be con- trolled by one product term and 7-4 by another. Configurations for the Input Macrocells (IMC) are specified by PSDsoft (see Application Note AN1171). Outputs of the Input Macrocells (IMC) can be read by the MCU via the IMC buffer. See Figure 21, page 51 to Figure 26, page 57 for ex- amples of the basic connections between the PSD and some popular MCUs. The PSD Control input pins are labeled as to the MCU function for which they are configured. The MCU bus interface is specified using the “I/O Ports”, on page 16. Input Macrocells (IMC) can use Address Strobe (ALE/AS, PD0) to latch address bits higher than A15. Any latched addresses are routed to the PLDs as inputs. Input Macrocells (IMC) are particularly useful with handshaking communication applications where two processors pass data back and forth through a common mailbox. Figure 18, page 46 shows a typical configuration where the Master MCU writes to the Port A Data Out Register. This, in turn, can be read by the Slave MCU via the activation of the “Slave-READ” output enable product term. The Slave can also write to the Port A Input Mac- rocells (IMC) and the Master can then read the In- put Macrocells (IMC) directly. Note that the “Slave-READ” and “Slave-Wr” sig- nals are product terms that are derived from the Slave MCU inputs READ Strobe (RD, CNTL1), WRITE Strobe (WR/WRL, CNTL0), and Slave_CS. Figure 16. Input Macrocell OUTPUT MACROCELLS A AND MACROCELLS B PT PT FEEDBACK PORT DRIVER I/O PIN INTERNAL DATA BUS DIRECTION REGISTER MUX MUX ALE/AS PT Q Q D D G LATCH INPUT MACROCELL ENABLE (.OE) D FF INPUT MACROCELL _ RD AI04926 |
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