PSD4235G2V-10UI datasheet(36/100 Pages) STMICROELECTRONICS

36 / 100 page

PSD4256G6V

36/100

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

Configuration Modes for MCUs with Separate Program and Data Spaces

Separate Space Modes. Program space is sep-

arated from Data space. For example, Program

Select Enable (PSEN, CNTL2) is used to access

the program code from the primary Flash memory,

while READ Strobe (RD, CNTL1) is used to ac-

cess data from the secondary Flash memory,

SRAM and I/O Port blocks. This configuration re-

quires the VM register to be set to 0Ch (see Figure

9).

Combined Space Modes

The Program and Data spaces are combined into

one memory space that allows the primary Flash

memory, secondary Flash memory, and SRAM to

be accessed by either Program Select Enable

(PSEN, CNTL2) or READ Strobe (RD, CNTL1).

For example, to configure the primary Flash mem-

ory in Combined space, Bits 2 and 4 of the VM reg-

ister are set to 1 (see Figure 10).

80C31 Memory Map Example

See the Application Notes for examples.

Figure 9. 8031 Memory Modules – Separate Space

Figure 10. 8031 Memory Modules – Combined Space

Primary

Flash

Memory

DPLD

Secondary

Flash

Memory

SRAM

RS0

CSBOOT0-3

FS0-FS15

PSEN

AI04922

Primary

Flash

Memory

DPLD

Secondary

Flash

Memory

SRAM

RS0

CSBOOT0-3

FS0-FS15

VM REG BIT 2

PSEN

VM REG BIT 0

VM REG BIT 1

VM REG BIT 3

VM REG BIT 4

AI04923

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