CYT4DNJBJS datasheet(204/209 Pages) INFINEON

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Datasheet

204

002-24601 Rev. *I

2023-02-14

TRAVEO™ T2G 32-bit Automotive MCU

Based on Arm® Cortex®-M7 dual

Revision history change log

26. Electrical specifi-

cations

Table 26-10

I2C Interface-Fast-mode

HSIO_STDLN:

CFG_DRIVE_EXT<1:0>/DRIVE_SEL_EXT<4:0

> = 0b00010, CFG_IN_AU-

TOLVL/VTRIP_SEL<0:0>= 0b0,

CFG_IN/VTRIP_SEL<0:0> = 0b0,

CFG/DRIVE_MODE<2:0> =0b100,

CFG_SLEW_EXT/SLEW<2:0> =0b000

HSIO_STDLN:

CFG_DRIVE_EXT<1:0>/DRIVE_SEL_EXT<

2:0> = 0b010, CFG_IN_AU-

TOLVL/VTRIP_SEL<0:0>= 0b0,

CFG_IN/VTRIP_SEL<0:0> = 0b0,

CFG/DRIVE_MODE<2:0> =0b100,

CFG_SLEW_EXT/SLEW<2:0> =0b000

(Note: SID158 is not valid for GPIO_STD,

HSIO_STDLN)

Correction

26. Electrical specifi-

cations

Table 26-10

I2C Interface-Fast-Plus mode

HSIO_STDLN:

CFG_DRIVE_EXT<1:0>/DRIVE_SEL_EXT<4:0

> =0b00010, CFG_IN_AU-

TOLVL/VTRIP_SEL<0:0>= 0b0,

CFG_IN/VTRIP_SEL<0:0> = 0b0,

CFG/DRIVE_MODE<2:0> =0b100,

CFG_SLEW_EXT/SLEW<2:0> =0b000

HSIO_STDLN:

CFG_DRIVE_EXT<1:0>/DRIVE_SEL_EXT<

2:0> =0b010, CFG_IN_AU-

TOLVL/VTRIP_SEL<0:0>= 0b0,

CFG_IN/VTRIP_SEL<0:0> = 0b0,

CFG/DRIVE_MODE<2:0> =0b100,

CFG_SLEW_EXT/SLEW<2:0> =0b000

(Note: SID178 is not valid for GPIO_STD,

GPIO_SMC, and HSIO_STDLN)

Correction

26. Electrical specifi-

cations

Table 26-10

SPI Interface

HSIO_STDLN:

CFG_DRIVE_EXT<1:0>/DRIVE_SEL_EXT<4:0

> = 0b00010, CFG_IN_AU-

TOLVL/VTRIP_SEL<0:0>= 0b0,

CFG_IN/VTRIP_SEL<0:0> = 0b0

HSIO_STDLN:

CFG_DRIVE_EXT<1:0>/DRIVE_SEL_EXT<

2:0> = 0b010, CFG_IN_AU-

TOLVL/VTRIP_SEL<0:0>= 0b0,

CFG_IN/VTRIP_SEL<0:0> = 0b0

26. Electrical specifi-

cations

Table 26-10

UART Interface

Recommended I/O Configuration:

HSIO_STDLN:

CFG_DRIVE_EXT<1:0>/DRIVE_SEL_EXT<4:0

> = 0b00010, CFG_IN_AU-

TOLVL/VTRIP_SEL<0:0>= 0b0,

CFG_IN/VTRIP_SEL<0:0> = 0b0

For SPI speeds ≤ 12.5 MHz

GPIO_STD: CFG_OUT/DRIVE_SEL<1:0> =

0b10, CFG_IN_AUTOLVL/VTRIP_SEL<0:0>=

0b0, CFG_IN/VTRIP_SEL<0:0> = 0b0

GPIO_ENH: CFG_OUT/DRIVE_SEL<1:0> =

0b10, CFG_IN_AUTOLVL/VTRIP_SEL<0:0>=

0b0, CFG_IN/VTRIP_SEL<0:0> = 0b0,

CFG_OUT/SLOW<0:0> = 0b0

GPIO_SMC: CFG_OUT/DRIVE_SEL<1:0> =

0b10, CFG_IN_AUTOLVL/VTRIP_SEL<0:0>=

0b0, CFG_IN/VTRIP_SEL<0:0> = 0b0,

CFG_OUT/SLOW<0:0> = 0b0

Recommended I/O Configuration:

GPIO_STD: CFG_OUT/DRIVE_SEL<1:0> =

0b10, CFG_IN_AU-

TOLVL/VTRIP_SEL<0:0>= 0b0,

CFG_IN/VTRIP_SEL<0:0> = 0b0

GPIO_ENH: CFG_OUT/DRIVE_SEL<1:0> =

0b10, CFG_IN_AU-

TOLVL/VTRIP_SEL<0:0>= 0b0,

CFG_IN/VTRIP_SEL<0:0> = 0b0,

CFG_OUT/SLOW<0:0> = 0b0

GPIO_SMC: CFG_OUT/DRIVE_SEL<1:0> =

0b10, CFG_IN_AU-

TOLVL/VTRIP_SEL<0:0>= 0b0,

CFG_IN/VTRIP_SEL<0:0> = 0b0,

CFG_OUT/SLOW<0:0> = 0b0

HSIO_STDLN:

CFG_DRIVE_EXT<1:0>/DRIVE_SEL_EXT<

2:0> = 0b010, CFG_IN_AU-

TOLVL/VTRIP_SEL<0:0>= 0b0,

CFG_IN/VTRIP_SEL<0:0> = 0b0

Correction

26. Electrical specifi-

cations

Table 26-20

(none)

Added Table 26-20 PLL400 operation

modes

Added

26. Electrical specifi-

cations

Note [81]

83.Mainly depending on the chosen

external crystal.

81.Oscillator startup time is a perfor-

mance parameter and mainly depending

on the chosen external crystal and load

capacitance.

Correction

26. Electrical specifi-

cations

Note [83]

85.Mainly depending on the chosen

external crystal.

83.Oscillator startup time is a perfor-

mance parameter and mainly depending

on the chosen external crystal and load

capacitance.

Correction

26. Electrical specifi-

cations

26.11.1 Minimum bus frequency

requirements

(none)

Added a section

Added

26. Electrical specifi-

cations

Table 26-33

Sound subsystem specifications

I2S I/O settings

Table 26-31

HSIO_STDLN:

CFG_DRIVE_EXT<1:0>/DRIVE_SEL_EXT<4:0

> =0b00100, CFG_IN_AU-

TOLVL/VTRIP_SEL<0:0>= 0b0,

CFG_IN/VTRIP_SEL<0:0> = 0b1,

CFG_SLEW_EXT/SLEW<2:0> =0b000

Table 26-33

HSIO_STDLN:

CFG_DRIVE_EXT<1:0>/DRIVE_SEL_EXT<

2:0> =0b100, CFG_IN_AU-

TOLVL/VTRIP_SEL<0:0>= 0b0,

CFG_IN/VTRIP_SEL<0:0> = 0b1,

CFG_SLEW_EXT/SLEW<2:0> =0b000

Correction

26. Electrical specifi-

cations

Table 26-33

Sound subsystem specifications

I2S I/O settings

Table 26-31

HSIO_STDLN:

CFG_DRIVE_EXT<1:0>/DRIVE_SEL_EXT<4:0

> =0b00100, CFG_IN_AU-

TOLVL/VTRIP_SEL<0:0>= 0b0,

CFG_IN/VTRIP_SEL<0:0> = 0b1,

CFG_SLEW_EXT/SLEW<2:0> =0b000

Table 26-33

HSIO_STDLN:

CFG_DRIVE_EXT<1:0>/DRIVE_SEL_EXT<

2:0> =0b100, CFG_IN_AU-

TOLVL/VTRIP_SEL<0:0>= 0b0,

CFG_IN/VTRIP_SEL<0:0> = 0b1,

CFG_SLEW_EXT/SLEW<2:0> =0b000

Correction

Rev. *I Section Updates (continued)

Section

Change Description

Current Spec (Rev. *H)

New Spec (Rev. *I)

Reason for change

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