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CYT4DNJBJS bảng dữ liệu(PDF) 66 Page - Infineon Technologies AG |
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CYT4DNJBJS bảng dữ liệu(HTML) 66 Page - Infineon Technologies AG |
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66 / 209 page  Datasheet 66 002-24601 Rev. *I 2023-02-14 TRAVEO™ T2G 32-bit Automotive MCU Based on Arm® Cortex®-M7 dual Triggers one-to-one 19 Triggers one-to-one Table 19-1 Triggers 1:1 Input Trigger In Trigger Out Description MUX Group 0: CAN0 to P-DMA0 Triggers 0 CAN0_DBG_TR_OUT[0] PDMA0_TR_IN[32] CAN0, Channel #0 P-DMA0 trigger 1 CAN0_FIFO0_TR_OUT[0] PDMA0_TR_IN[33] CAN0, Channel #0 FIFO0 trigger 2 CAN0_FIFO1_TR_OUT[0] PDMA0_TR_IN[34] CAN0, Channel #0 FIFO1 trigger 3 CAN0_DBG_TR_OUT[1] PDMA0_TR_IN[35] CAN0, Channel #1 P-DMA0 trigger 4 CAN0_FIFO0_TR_OUT[1] PDMA0_TR_IN[36] CAN0, Channel #1 FIFO0 trigger 5 CAN0_FIFO1_TR_OUT[1] PDMA0_TR_IN[37] CAN0, Channel #1 FIFO1 trigger 6:37 PASS0_CH_DONE_TR_OUT[0:31] PDMA0_TR_IN[38:69] PASS0 SAR0 to P-DMA0 direct connect 38 SMIF0_TX_TR_OUT PDMA0_TR_IN[70] SMIF TX to P-DMA0 Trigger 39 SMIF0_RX_TR_OUT PDMA0_TR_IN[71] SMIF RX to P-DMA0 Trigger 40:41 CXPI0_TX_TR_OUT[0:1] PDMA0_TR_IN[72:73] CXPI 0 TX P-DMA0 Triggers 42:43 CXPI0_RX_TR_OUT[0:1] PDMA0_TR_IN[74:75] CXPI 0 RX P-DMA0 Triggers MUX Group 1: SCBx to P-DMA1 Triggers 0 SCB0_TX_TR_OUT PDMA1_TR_IN[16] SCB0 to P-DMA1 Trigger 1 SCB0_RX_TR_OUT PDMA1_TR_IN[17] SCB0 to P-DMA1 Trigger 2 SCB1_TX_TR_OUT PDMA1_TR_IN[18] SCB1 to P-DMA1 Trigger 3 SCB1_RX_TR_OUT PDMA1_TR_IN[19] SCB1 to P-DMA1 Trigger 4 SCB2_TX_TR_OUT PDMA1_TR_IN[20] SCB2 to P-DMA1 Trigger 5 SCB2_RX_TR_OUT PDMA1_TR_IN[21] SCB2 to P-DMA1 Trigger 6 SCB3_TX_TR_OUT PDMA1_TR_IN[22] SCB3 to P-DMA1 Trigger 7 SCB3_RX_TR_OUT PDMA1_TR_IN[23] SCB3 to P-DMA1 Trigger 8 SCB4_TX_TR_OUT PDMA1_TR_IN[24] SCB4 to P-DMA1 Trigger 9 SCB4_RX_TR_OUT PDMA1_TR_IN[25] SCB4 to P-DMA1 Trigger 10 SCB5_TX_TR_OUT PDMA1_TR_IN[26] SCB5 to P-DMA1 Trigger 11 SCB5_RX_TR_OUT PDMA1_TR_IN[27] SCB5 to P-DMA1 Trigger 12 SCB6_TX_TR_OUT PDMA1_TR_IN[28] SCB6 to P-DMA1 Trigger 13 SCB6_RX_TR_OUT PDMA1_TR_IN[29] SCB6 to P-DMA1 Trigger 14 SCB7_TX_TR_OUT PDMA1_TR_IN[30] SCB7 to P-DMA1 Trigger 15 SCB7_RX_TR_OUT PDMA1_TR_IN[31] SCB7 to P-DMA1 Trigger 16 SCB8_TX_TR_OUT PDMA1_TR_IN[32] SCB8 to P-DMA1 Trigger 17 SCB8_RX_TR_OUT PDMA1_TR_IN[33] SCB8 to P-DMA1 Trigger 18 SCB9_TX_TR_OUT PDMA1_TR_IN[34] SCB9 to P-DMA1 Trigger 19 SCB9_RX_TR_OUT PDMA1_TR_IN[35] SCB9 to P-DMA1 Trigger 20 SCB10_TX_TR_OUT PDMA1_TR_IN[36] SCB10 to P-DMA1 Trigger 21 SCB10_RX_TR_OUT PDMA1_TR_IN[37] SCB10 to P-DMA1 Trigger 22 SCB11_TX_TR_OUT PDMA1_TR_IN[38] SCB11 to P-DMA1 Trigger 23 SCB11_RX_TR_OUT PDMA1_TR_IN[39] SCB11 to P-DMA1 Trigger 24 CAN1_DBG_TR_OUT[0] PDMA1_TR_IN[40] CAN1 Channel #0 P-DMA1 trigger 25 CAN1_FIFO0_TR_OUT[0] PDMA1_TR_IN[41] CAN1 Channel #0 FIFO0 trigger 26 CAN1_FIFO1_TR_OUT[0] PDMA1_TR_IN[42] CAN1 Channel #0 FIFO1 trigger 27 CAN1_DBG_TR_OUT[1] PDMA1_TR_IN[43] CAN1 Channel #1 P-DMA1 trigger 28 CAN1_FIFO0_TR_OUT[1] PDMA1_TR_IN[44] CAN1 Channel #1 FIFO0 trigger 29 CAN1_FIFO1_TR_OUT[1] PDMA1_TR_IN[45] CAN1 Channel #1 FIFO1 trigger |
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