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Giải thích chi tiết về linh kiện  TRAVEO™ T2G 32-bit Automotive MCU Based on Arm® Cortex®-M7 dual
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Datasheet
54
002-24601 Rev. *I
2023-02-14
TRAVEO™ T2G 32-bit Automotive MCU
Based on Arm® Cortex®-M7 dual
Interrupts and wake-up assignments
456
cpuss_interrupts_dw1_32_IRQn
Active
CPUSS P-DMA1, Channel #32 Interrupt
457
cpuss_interrupts_dw1_33_IRQn
Active
CPUSS P-DMA1, Channel #33 Interrupt
458
cpuss_interrupts_dw1_34_IRQn
Active
CPUSS P-DMA1, Channel #34 Interrupt
459
cpuss_interrupts_dw1_35_IRQn
Active
CPUSS P-DMA1, Channel #35 Interrupt
460
cpuss_interrupts_dw1_36_IRQn
Active
CPUSS P-DMA1, Channel #36 Interrupt
461
cpuss_interrupts_dw1_37_IRQn
Active
CPUSS P-DMA1, Channel #37 Interrupt
462
cpuss_interrupts_dw1_38_IRQn
Active
CPUSS P-DMA1, Channel #38 Interrupt
463
cpuss_interrupts_dw1_39_IRQn
Active
CPUSS P-DMA1, Channel #39 Interrupt
464
cpuss_interrupts_dw1_40_IRQn
Active
CPUSS P-DMA1, Channel #40 Interrupt
465
cpuss_interrupts_dw1_41_IRQn
Active
CPUSS P-DMA1, Channel #41 Interrupt
466
cpuss_interrupts_dw1_42_IRQn
Active
CPUSS P-DMA1, Channel #42 Interrupt
467
cpuss_interrupts_dw1_43_IRQn
Active
CPUSS P-DMA1, Channel #43 Interrupt
468
cpuss_interrupts_dw1_44_IRQn
Active
CPUSS P-DMA1, Channel #44 Interrupt
469
cpuss_interrupts_dw1_45_IRQn
Active
CPUSS P-DMA1, Channel #45 Interrupt
470
cpuss_interrupts_dw1_46_IRQn
Active
CPUSS P-DMA1, Channel #46 Interrupt
471
cpuss_interrupts_dw1_47_IRQn
Active
CPUSS P-DMA1, Channel #47 Interrupt
472
cpuss_interrupts_dw1_48_IRQn
Active
CPUSS P-DMA1, Channel #48 Interrupt
473
cpuss_interrupts_dw1_49_IRQn
Active
CPUSS P-DMA1, Channel #49 Interrupt
474
cpuss_interrupts_dw1_50_IRQn
Active
CPUSS P-DMA1, Channel #50 Interrupt
475
cpuss_interrupts_dw1_51_IRQn
Active
CPUSS P-DMA1, Channel #51 Interrupt
476
cpuss_interrupts_dw1_52_IRQn
Active
CPUSS P-DMA1, Channel #52 Interrupt
477
cpuss_interrupts_dw1_53_IRQn
Active
CPUSS P-DMA1, Channel #53 Interrupt
478
cpuss_interrupts_dw1_54_IRQn
Active
CPUSS P-DMA1, Channel #54 Interrupt
479
cpuss_interrupts_dw1_55_IRQn
Active
CPUSS P-DMA1, Channel #55 Interrupt
480
cpuss_interrupts_dw1_56_IRQn
Active
CPUSS P-DMA1, Channel #56 Interrupt
481
cpuss_interrupts_dw1_57_IRQn
Active
CPUSS P-DMA1, Channel #57 Interrupt
482
cpuss_interrupts_dw1_58_IRQn
Active
CPUSS P-DMA1, Channel #58 Interrupt
483
cpuss_interrupts_dw1_59_IRQn
Active
CPUSS P-DMA1, Channel #59 Interrupt
484
cpuss_interrupts_dw1_60_IRQn
Active
CPUSS P-DMA1, Channel #60 Interrupt
485
cpuss_interrupts_dw1_61_IRQn
Active
CPUSS P-DMA1, Channel #61 Interrupt
486
cpuss_interrupts_dw1_62_IRQn
Active
CPUSS P-DMA1, Channel #62 Interrupt
487
cpuss_interrupts_dw1_63_IRQn
Active
CPUSS P-DMA1, Channel #63 Interrupt
488
cpuss_interrupts_dw1_64_IRQn
Active
CPUSS P-DMA1, Channel #64 Interrupt
489
cpuss_interrupts_dw1_65_IRQn
Active
CPUSS P-DMA1, Channel #65 Interrupt
490
cpuss_interrupts_dw1_66_IRQn
Active
CPUSS P-DMA1, Channel #66 Interrupt
491
cpuss_interrupts_dw1_67_IRQn
Active
CPUSS P-DMA1, Channel #67 Interrupt
492
cpuss_interrupts_dw1_68_IRQn
Active
CPUSS P-DMA1, Channel #68 Interrupt
493
cpuss_interrupts_dw1_69_IRQn
Active
CPUSS P-DMA1, Channel #69 Interrupt
494
cpuss_interrupts_dw1_70_IRQn
Active
CPUSS P-DMA1, Channel #70 Interrupt
495
cpuss_interrupts_dw1_71_IRQn
Active
CPUSS P-DMA1, Channel #71 Interrupt
496
cpuss_interrupts_dw1_72_IRQn
Active
CPUSS P-DMA1, Channel #72 Interrupt
497
cpuss_interrupts_dw1_73_IRQn
Active
CPUSS P-DMA1, Channel #73 Interrupt
498
cpuss_interrupts_dw1_74_IRQn
Active
CPUSS P-DMA1, Channel #74 Interrupt
Table 14-1
Peripheral interrupt assignments and wake-up sources (continued)
Interrupt
Source
Power
mode
Description



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