CYT4DNJBJS datasheet(206/209 Pages) INFINEON

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Datasheet

206

002-24601 Rev. *I

2023-02-14

TRAVEO™ T2G 32-bit Automotive MCU

Based on Arm® Cortex®-M7 dual

Revision history change log

Rev. *I Electrical Spec Updates

Spec ID

Description

Changed Item

Current Spec (Rev. *H)

New Spec (Rev. *I)

Reason for Change

Spec ID

Description

Changed Item

Current Spec (Rev. *H)

New Spec (Rev. *I)

Reason for Change

SID965A

Allowed Overshoot/

Undershoot input

voltage on HSIO_ENH

All

(none)

Parameter: VOS_US_IN

Description: Allowed Overshoot/

Undershoot input voltage on

HSIO_ENH

Min: –

Typ: –

Max: 1 V

Details/Conditions: Maximum

allowed Overshoot/undershoot

input on HSIO_ENH IO-cells

Added spec

SID966B

Allowed Overshoot/

Undershoot input

Duration on HSIO_ENH

All

(none)

Parameter: TOS_US_IN

Description: Allowed Overshoot/

Undershoot input Duration on

HSIO_ENH

Min: –

Typ: –

Max: 5 ns

Details/Conditions: Maximum

allowed Overshoot/undershoot

input on HSIO_ENH IO-cells

Added spec

SID138

Fall time of SCL and SDA

Details/Condi-

tions

Details/Conditions: Input and

output

Only for GPIO_ENH with

CFG_OUT/SLOW<0:0> =0b1

Details/Conditions: Input and

output

Output: Only valid for GPIO_ENH,

GPIO_SMC,

GPIO_STD

Updated

description

SID158

Fall time of SCL and SDA

Details/Condi-

tions

Details/Conditions: Input and

output

Output: Only for GPIO_ENH with

CFG_OUT/SLOW<0:0> =0b1

Details/Conditions: Input and

output

Output: Only valid for GPIO_ENH,

GPIO_SMC

Updated

description

SID178

Fall time of SCL and SDA

Details/Condi-

tions

Details/Conditions: Input and

output, 20-pF load

Output: Only for GPIO_ENH with

CFG_OUT/SLOW<0:0> =0b1

Details/Conditions: Input and

output, 20pF load

Output: Only for GPIO_ENH

Updated

description

SID240B

Signaling rate for TX on P15.3 for SCB#1

and P18.5 for SCB#4

All

(none)

Parameter: fBPS_TX

Description: Signaling rate for TX on

P15.3 for SCB#1 and P18.5 for SCB#4

Min:–

Typ:–

Max:25 Mbps

Details/Conditions: Valid only for TX

at 20 pF load

Added spec

SID241B

Frequency accuracy of TX bit time on

P15.3 for SCB#1 and P18.5 for SCB#4

All

(none)

Parameter: fACC

Description: Frequency accuracy of

TX bit time on P15.3 for SCB#1 and

P18.5 for SCB#4

Min: –0.5 ns

Typ:–

Max: 0.5 ns

Details/Conditions:With PLL, 200

MHz ≤ fVCO ≤ 400 MHz at 20 pF load

Added spec

SID242B

Jitter of TX on P15.3 for SCB#1 and P18.5

for SCB#4

All

(none)

Parameter: fJIT

Description:Jitter of TX on P15.3 for

SCB#1 and P18.5 for SCB#4

Min: –4.5 ns

Typ: –

Max: 4.5 ns

Details/Conditions: at 20 pF load

Added spec

SID274A

VDDD power ramp rate with robust BOD -

XRES_L asserted (BOD operation is

guaranteed)

Spec ID

Description

Details/Condi-

tions

Spec ID: SID274

Description: VDDD power ramp rate

with robust BOD (BOD operation is

guaranteed)

Details/Conditions: This ramp

supports robust BOD

Spec ID: SID274A

Description: VDDD power ramp rate

with robust BOD - XRES_L asserted

(BOD operation is guaranteed)

Details/Conditions: Applies to ramp

up and ramp down

Updated

description

SID274B

VDDD power ramp rate with robust BOD -

XRES_L de-asserted (BOD operation is

guaranteed)

All

(none)

Parameter: POR_RR1

Description:VDDD power ramp rate

with robust BOD - XRES_L

de-asserted (BOD operation is

guaranteed)

Min: 1 mV/μs

Typ: –

Max: 100 mV/μs

Details/Conditions: Applies to ramp

up and ramp down

Added spec

SID275

VDDD power ramp rate without robust

BOD

Min

Details/Condi-

tions

Min: –

Details/Conditions: This ramp does

not support robust BOD

tPOFF must be satisfied.

Min: 100 mV/μs

Details/Conditions: This ramp does

not support robust BOD

tPOFF must be satisfied.

Applies to ramp up and ramp down

Updated

description

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