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CYT4DNJBJS bảng dữ liệu(PDF) 170 Page - Infineon Technologies AG |
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CYT4DNJBJS bảng dữ liệu(HTML) 170 Page - Infineon Technologies AG |
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170 / 209 page ![]() Datasheet 170 002-24601 Rev. *I 2023-02-14 TRAVEO™ T2G 32-bit Automotive MCU Based on Arm® Cortex®-M7 dual Electrical specifications SID1111 tMCLKI_DUTY Master clock input duty cycle 40 – 50 % Guaranteed by design Sound Generator Recommended I/O configuration: GPIO_STD: CFG_OUT/DRIVE_SEL<1:0> = 0b01 GPIO_SMC: CFG_OUT/DRIVE_SEL<1:0> = 0b01 HSIO_STDLN: CFG_DRIVE_EXT<1:0>/DRIVE_SEL_EXT<2:0> = 0b011, CFG_SLEW_EXT/SLEW<0:0> = 0b0 SID1102 fPWM PWM sample frequency 15 – 60 kHz Guaranteed by design SID1103 tMCLK Master clock input period 10 – – ns Guaranteed by design SID1104 tMCLKI_DUTY Master clock input duty cycle 40 – 50 % Guaranteed by design AudioDAC SID1300 fCLKDA0 System clock frequency 2.048 – 18.432 MHz All parameters specified fS = 44.1 kHz, system clock 256 × fS and 16-bit data, RL = 20 kΩ, CL = 100 pF, unless otherwise noted SID1301 fS Sampling clock 8 – 48 kHz SID1302 RL Analog output load resistance 20 – – kΩ DAC_L, DAC_R SID1303 CL Analog output load capacitance – – 100 pF DAC_L, DAC_R SID1304 CCOM Com Capacitance 2.2 – 10 µF C_L, C_R SID1305 VOUT_MAX Analog output single-end output range (±full scale) 0.655 × VDDA_DAC 0.673 × VDDA_DAC 0.690 × VDDA_DAC VP-P DAC_L, DAC_R, RL = 20 kΩ, CL = 100 pF SID1306 VOUT_ZERO Analog output voltage (zero) 0.49 × VDDA_DAC 0.5 × VDDA_DAC 0.51 × VDDA_DAC V DAC_L, DAC_R SID1307 THD + N THD + N (Signal to Noise + Distortion ratio) – –82 –72 dB These values do not include the noise caused by the analog power supply. Signal frequency: 1 kHz LPF (fC: 20 kHz) SID1308 SNR Signal to Noise ratio 85 89 – dB These values do not include the noise caused by the analog power supply. Signal frequency: 1 kHz LPF (fC: 20 kHz) A-weighting filter SID1309 DR Dynamic range 83 86 – dB These values do not include the noise caused by the analog power supply. Signal frequency: 1 kHz LPF (fC: 20 kHz) A-weighting filter SID1310 GAIN_MM Gain mismatch between channels – – 0.4 dB Signal frequency: 1 kHz SID1312 CH_SEP Channel Separation – 80 – dB SID1313 ZOUT Output impedance 150 200 250 Ω SID1314 PSRR_50 PSRR @ 50 Hz, digital input = 0 – –35 – dB Digital input: zero noise 50 Hz Table 26-33 Sound subsystem specifications (continued) Spec ID Parameter Description Min Typ Max Units Details/conditions |
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