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TMS570LS bảng dữ liệu(PDF) 94 Page - Texas Instruments

tên linh kiện TMS570LS
Giải thích chi tiết về linh kiện  Series 16/32-BIT RISC Flash Microcontroller
PDF  107 Pages
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TMS570LS bảng dữ liệu(HTML) 94 Page - Texas Instruments

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t(RTP)disable
t(RTP)enable
HCLK
RTPCLK
RTPENA
RTPSYNC
RTPDATA
t(RTP)disable
t(RTP)enable
HCLK
RTPCLK
RTPENA
RTPSYNC
RTPDATA
t(RTP)enable
t(RTP)disable
HCLK
RTPCLK
RTPENA
RTPSYNC
RTPDATA
d1
d2
d3
d4
d5
d6
d7
d8
Divide by 1
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16
TMS570LS20206-EP, TMS570LS20216-EP
SPNS209A – JUNE 2012 – REVISED AUGUST 2012
www.ti.com
7.16.3 RTPENABLE Timing
Figure 7-23. RTPENABLE Timing
Table 7-24. RTPENABLE Timing
Parameter
Minimum
Maximum
Description
t(RTP)disable
1.5tc(HCLK) + tr(RTPSYNC) + 12ns
Time that RTPENA must go high
before the next scheduled
RTPSYNC in order to suspend
transmission for the packet
following the scheduled
RTPSYNC.
t(RTP)enable
4.5tc(HCLK) + tr(RTPSYNC)
5.5tc(HCLK) + tr(RTPSYNC) + 12ns
Time after RTPENA goes low
before a packet that has been
halted, resumes.
94
Peripheral and Electrical Specifications
Copyright © 2012, Texas Instruments Incorporated
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Product Folder Link(s): TMS570LS20206-EP TMS570LS20216-EP



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