TMS570LS datasheet(5/107 Pages) TI1

5 / 107 page

TMS570LS20206-EP, TMS570LS20216-EP

www.ti.com

SPNS209A – JUNE 2012 – REVISED AUGUST 2012

Several interfaces are implemented to enhance the debugging capabilities of application code. In addition

to the built in ARM Cortex™-R4F CoreSight™ debug features, an External Trace Macrocell (ETM)

provides instruction and data trace of program execution. For instrumentation purposes, a RAM Trace Port

Module (RTP) is implemented to support high-speed output of RAM accesses by the CPU or any other

master. A Direct Memory Module (DMM) gives the ability to write external data into the device memory.

Both the RTP and DMM have no or only minimum impact on the program execution time of the application

code. A Parameter Overlay Module (POM) can re-route Flash accesses to the EMIF, thus avoiding the re-

programming steps necessary for parameter updates in Flash.

1.4

ORDERING INFORMATION

(1)

ORDERABLE

TOP-SIDE

PACKAGE

VID NUMBER

PART NUMBER

MARKING

S5LS20206ASGWTMEP

S20206ASGWTMEP

V62/12622-01YE

NFBGA (GWT)

S5LS20216ASGWTMEP

S20216ASGWTMEP

V62/12622-02YE

–55°C to 125°C

S5LS20206ASPGEMEP

S20206ASPGEMEP

V62/12622-01XE

LQFP (PGE)

S5LS20216ASPGEMEP

S20216ASPGEMEP

V62/12622-02XE

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

TMS570LS Series 16/32-BIT RISC Flash Microcontroller

Submit Documentation Feedback

Product Folder Link(s): TMS570LS20206-EP TMS570LS20216-EP

TMS570LS bảng dữ liệu(PDF) 5 Page - Texas Instruments