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TMS570LS bảng dữ liệu(PDF) 76 Page - Texas Instruments |
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TMS570LS bảng dữ liệu(HTML) 76 Page - Texas Instruments |
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76 / 107 page ![]() 1 1 2 3 5 TMS TDI TDO RTCK TCK 4 TMS570LS20206-EP, TMS570LS20216-EP SPNS209A – JUNE 2012 – REVISED AUGUST 2012 www.ti.com 7.5 DAP - JTAG Scan Interface Timing 7.5.1 JTAG clock specification 12-MHz and 50-pF load on TDO output Table 7-9. JTAG Scan Interface Timing NO. MIN MAX Unit f(TCK) TCK frequency (at HCLKmax) 12 MHz f(RTCK) RTCK frequency (at TCKmax and HCLKmax) 10 MHz 1 td(TCK -RTCK) Delay time, TCK to RTCK 20 ns 2 tsu(TDI/TMS - RTCKr) Setup time, TDI, TMS before RTCK rise (RTCKr) 15 ns 3 th(RTCKr -TDI/TMS) Hold time, TDI, TMS after RTCKr 0 ns 4 th(RTCKf -TDO) Hold time, TDO after RTCKf 0 ns 5 td(RTCKf -TDO) Delay time, TDO valid after RTCK fall (RTCKf) 10 ns Note: The timings in this table are measured with a 50pF and 50µA load. And they are measured at the 50% point, not 20% or 80% point. Figure 7-6. JTAG timing 76 Peripheral and Electrical Specifications Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS570LS20206-EP TMS570LS20216-EP |
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