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TMS320DM355CZCEA13 bảng dữ liệu(PDF) 108 Page - Texas Instruments

tên linh kiện TMS320DM355CZCEA13
Giải thích chi tiết về linh kiện  Digital Media System-on-Chip (DMSoC)
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TMS320DM355CZCEA13 bảng dữ liệu(HTML) 108 Page - Texas Instruments

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MXI/CLKIN
2
3
4
4
5
1
MXI/CLKIN
2
3
4
4
5
1
TMS320DM355
SPRS463G – SEPTEMBER 2007 – REVISED JUNE 2010
www.ti.com
5.5.3
Clock PLL Electrical Data/Timing (Input and Output Clocks)
Table 5-5. Timing Requirements for MXI1/CLKIN1(1) (2) (see Figure 5-7)
DM355
NO.
PARAMETER
UNIT
MIN
TYP
MAX
1
tc(MXI1)
Cycle time, MXI1/CLKIN1
27.7 (3)
41.6 (3)
ns
2
tw(MXI1H)
Pulse duration, MXI1/CLKIN1 high
0.45C
0.55C
ns
3
tw(MXI1L)
Pulse duration, MXI1/CLKIN1 low
0.45C
0.55C
ns
0.25C or
4
tt(MXI1)
Transition time, MXI1/CLKIN1
ns
10(4)
5
tJ(MXI1)
Period jitter, MXI1/CLKIN1
0.02C
ns
(1)
The reference points for the rise and fall transitions are measured at VIL MAX and VIH MIN.
(2)
C = MXI1/CLKIN1 cycle time in ns. For example, when MXI1/CLKIN1 frequency is 24 MHz use C = 41.6 ns.
(3)
tc(MXI1) = 41.6 ns and tc(MXI1) = 27.7 ns are the only supported cycle times for MXI1/CLKIN1.
(4)
Whichever is smaller. C = the period of the applied signal. Maintaining transition times as fast as possible is recommended to improve
noise immunity on input signals.
Figure 5-7. MXI1/CLKIN1 Timing
Table 5-6. Timing Requirements for MXI2/CLKIN2(1) (2) (see Figure 5-7)
DM355
NO.
PARAMETER
UNIT
MIN
TYP
MAX
1
tc(MXI2)
Cycle time, MXI2/CLKIN2
37.037 (3)
37.037 (3)
ns
2
tw(MXI2H)
Pulse duration, MXI2/CLKIN2 high
0.45C
0.55C
ns
3
tw(MXI2L)
Pulse duration, MXI2/CLKIN2 low
0.45C
0.55C
ns
0.25C or
4
tt(MXI2)
Transition time, MXI2/CLKIN2
ns
10(4)
5
tJ(MXI2)
Period jitter, MXI2/CLKIN2
0.02C
ns
(1)
The reference points for the rise and fall transitions are measured at VIL MAX and VIH MIN.
(2)
C = MXI2/CLKIN2 cycle time in ns. For example, when MXI2/CLKIN2 frequency is 27 MHz use C = 37.037 ns.
(3)
tc(MXI2) = 37.037 ns is the only supported cycle time for MXI2/CLKIN2.
(4)
Whichever is smaller. C = the period of the applied signal. Maintaining transition times as fast as possible is recommended to improve
noise immunity on input signals.
Figure 5-8. MXI2/CLKIN2 Timing
108
DM355 Peripheral Information and Electrical Specifications
Copyright © 2007–2010, Texas Instruments Incorporated
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Product Folder Link(s): TMS320DM355



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