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TMS320DM355CZCEA13 bảng dữ liệu(PDF) 1 Page - Texas Instruments |
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TMS320DM355CZCEA13 bảng dữ liệu(HTML) 1 Page - Texas Instruments |
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1 / 163 page  TMS320DM355 www.ti.com SPRS463G – SEPTEMBER 2007 – REVISED JUNE 2010 TMS320DM355 Digital Media System-on-Chip (DMSoC) Check for Samples: TMS320DM355 1 TMS320DM355 Digital Media System-on-Chip (DMSoC) 1.1 Features 123 – ARM® Jazelle® Technology • Highlights – EmbeddedICE-RT™ Logic for Real-Time – High-Performance Digital Media Debug System-on-Chip (DMSoC) • ARM9 Memory Architecture – Up to 270-MHz ARM926EJ-S™ Clock Rate – 16K-Byte Instruction Cache – MPEG4/JPEG Coprocessor Supports – 8K-Byte Data Cache • Up to 720p MPEG4 SP – 32K-Byte RAM • Up to 50M Pixels per Second JPEG – 8K-Byte ROM – Video Processing Subsystem – Little Endian • Hardware IPIPE for Real-Time Image Processing • MPEG4/JPEG Coprocessor • Up to 14-bit CCD/CMOS Digital Interface – Fixed Function Coprocessor Supports: • Histogram Module • MPEG4 SP Codec at HD (720p), D1, VGA, SIF • Resize Image 1/16x to 8x • JPEG Codec up to 50M Pixels per Second • Hardware On-Screen Display • Video Processing Subsystem • Supports digital HDTV (720p/1080i) output for connection to external encoder – Front End Provides: – Peripherals include DDR and mDDR SDRAM, • Hardware IPIPE for Real-Time Image 2 MMC/SD/SDIO and SmartMedia Flash Card Processing Interfaces, USB 2.0, 3 UARTs and 3 SPIs • Up to 14-bit CCD/CMOS Digital Interface – Configurable Power-Saving Modes • 16-/8-bit Generic YcBcR-4:2 Interface – On-Chip ARM ROM Bootloader (RBL) to Boot (BT.601) From NAND Flash, MMC/SD, or UART • 10-/8-bit CCIR6565/BT655 Interface – Extended Temperature 135- and 216-MHz • Up to 75-MHz Pixel Clock Devices are Available • Histogram Module – 3.3-V and 1.8-V I/O, 1.3-V Core • Resize Engine – Debug Interface Support – Resize Images From 1/16x to 8x – 337-Pin Ball Grid Array at 65 nm Process – Separate Horizontal/Vertical Control Technology – Two Simultaneous Output Paths • High-Performance Digital Media – Back End Provides: System-on-Chip (DMSoC) • Hardware On-Screen Display (OSD) – 135-, 216-, and 270-MHz ARM926EJ-S™ • Composite NTSC/PAL video encoder Clock Rate output – Fully Software-Compatible With ARM9™ • 8-/16-bit YCC and Up to 18-Bit RGB666 – Extended temperature support for 135- and Digital Output 216-MHz devices • BT.601/BT.656 Digital YCbCr 4:2:2 • ARM926EJ-S Core (8-/16-Bit) Interface – Support for 32-Bit and 16-Bit (Thumb Mode) • Supports digital HDTV (720p/1080i) output Instruction Sets for connection to external encoder – DSP Instruction Extensions and Single Cycle • External Memory Interfaces (EMIFs) MAC – DDR2 and mDDR SDRAM 16-bit wide EMIF 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 Windows is a trademark of Microsoft. 3 All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Copyright © 2007–2010, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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