TMS320DM355CZCEA13 datasheet(61/163 Pages) TI1

61 / 163 page

TMS320DM355

www.ti.com

SPRS463G – SEPTEMBER 2007 – REVISED JUNE 2010

Detailed Device Description

This section provides a detailed overview of the DM355 device.

3.1

ARM Subsystem Overview

The ARM Subsystem contains components required to provide the ARM926EJ-S (ARM) master control of

the overall DM355 system, including the components of the ARM Subsystem, the peripherals, and the

external memories.

The ARM is responsible for handling system functions such as system-level initialization, configuration,

user interface, user command execution, connectivity functions, interface and control of the subsystem,

etc. The ARM is master and performs these functions because it has a large program memory space and

fast context switching capability, and is thus suitable for complex, multi-tasking, and general-purpose

control tasks.

3.1.1

Components of the ARM Subsystem

The ARM Subsystem in DM355 consists of the following components:

•

ARM926EJ-S RISC processor, including:

–

coprocessor 15 (CP15)

–

MMU

–

16KB Instruction cache

–

8KB Data cache

–

Write Buffer

–

Java accelerator

•

ARM Internal Memories

–

32KB Internal RAM (32-bit wide access)

–

8KB Internal ROM (ARM bootloader for non-AEMIF boot options)

•

Embedded Trace Module and Embedded Trace Buffer (ETM/ETB)

•

System Control Peripherals

–

ARM Interrupt Controller

–

PLL Controller

–

Power and Sleep Controller

–

System Control Module

The ARM also manages/controls all the device peripherals:

•

DDR2 / mDDR EMIF Controller

•

AEMIF Controller, including the OneNAND and NAND flash interface

•

Enhanced DMA (EDMA)

•

UART

•

Timers

•

Real Time Out (RTO)

•

Pulse Width Modulator (PWM)

•

Inter-IC Communication (I2C)

•

Multi-Media Card/Secure Digital (MMC/SD)

•

Audio Serial Port (ASP)

•

Universal Serial Bus Controller (USB)

•

Serial Port Interface (SPI)

•

Video Processing Front End (VPFE)

–

CCD Controller (CCDC)

Detailed Device Description

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