TMS320DM355CZCEA13 datasheet(60/163 Pages) TI1

60 / 163 page

TMS320DM355

SPRS463G – SEPTEMBER 2007 – REVISED JUNE 2010

www.ti.com

peripheral in the TMS320DM35x Digital Media System-on-Chip (DMSoC). The GPIO

peripheral provides dedicated general-purpose pins that can be configured as either inputs

or outputs. When configured as an input, you can detect the state of the input by reading the

state of an internal register. When configured as an output, you can write to an internal

SPRUEE7

TMS320DM35x Digital Media System-on-Chip (DMSoC) Pulse-Width Modulator (PWM)

Reference Guide This document describes the pulse-width modulator (PWM) peripheral in

the TMS320DM35x Digital Media System-on-Chip (DMSoC).

SPRUEH7

TMS320DM35x

Digital

Media

System-on-Chip

(DMSoC)

DDR2/Mobile

DDR

(DDR2/mDDR) Memory Controller Reference Guide This document describes the

DDR2/mDDR memory controller in the TMS320DM35x Digital Media System-on-Chip

(DMSoC). The DDR2/mDDR memory controller is used to interface with JESD79D-2A

standard compliant DDR2 SDRAM and mobile DDR devices.

SPRUF71

TMS320DM35x Digital Media System-on-Chip (DMSoC) Video Processing Front End

(VPFE) Reference Guide This document describes the Video Processing Front End (VPFE)

in the TMS320DM35x Digital Media System-on-Chip (DMSoC).

SPRUF72

TMS320DM35x Digital Media System-on-Chip (DMSoC) Video Processing Back End

(VPBE) Reference Guide This document describes the Video Processing Back End (VPBE)

in the TMS320DM35x Digital Media System-on-Chip (DMSoC).

SPRUF74

TMS320DM35x Digital Media System-on-Chip (DMSoC) Real-Time Out (RTO) Controller

Reference Guide This document describes the Real Time Out (RTO) controller in the

TMS320DM35x Digital Media System-on-Chip (DMSoC).

SPRUFC8

TMS320DM35x

Digital

Media

System-on-Chip

(DMSoC)

Peripherals

Overview

Reference Guide This document provides an overview of the peripherals in the

TMS320DM35x Digital Media System-on-Chip (DMSoC).

SPRAAR3

Implementing DDR2/mDDR PCB Layout on the TMS320DM35x DMSoC This provides

board design recommendations and guidelines for DDR2 and mobile DDR.

SPRAAR7

USB

2.0

Board

Design

and

Layout

Guidelines

This

provides

board

design

recommendations and guidelines for high speed USB.

Device Overview

Submit Documentation Feedback

Product Folder Link(s): TMS320DM355

TMS320DM355CZCEA13 bảng dữ liệu(PDF) 60 Page - Texas Instruments

TMS320DM355CZCEA13 bảng dữ liệu(HTML) 60 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL