TMS320DM355CZCEA13 datasheet(92/163 Pages) TI1

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TMS320DM355

SPRS463G – SEPTEMBER 2007 – REVISED JUNE 2010

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ID.

–

The RBL contains an internal table with a list of known NAND devices. Table 3-23 shows the

devices contained in the tables.

–

If the device ID is not found in the table, then the RBL use the fourth byte of the NAND to decode

this to obtain the necessary parameters.

•

Once a device ID is identified, the first 24 blocks of the NAND are read sequentially starting with page

0 with an offset of 512 bytes. The purpose of the read is to locate a magic number which will identify

the revision of the silicon. Table 3-24 contains magic numbers and their functions.

•

If a Compatibility mode magic number is read, then the device enters compatibility mode. In

compatibility mode, NAND layout is identical to that used in previous revisions of the silicon as shown

in Table 3-25. Only 512-byte small blocks and 2048-byte big blocks are supported.

•

If a Standard mode magic number is read, the NAND layout is as shown in Table 3-26: 512-bytes

small block and 2048- and 4096- big block devices are supported. 8192-block devices are also

supported. Note: At the time of production of this document revision, only 4096-block devices were

available for testing.

•

Once a magic number is identified, the User Boot Loader (UBL) is loaded from the NAND, stored to

internal RAM, and executed.

Table 3-23. NAND Devices in NAND Device ID Table

DEVICE ID

PAGES PER BLOCK

BYTES PER PAGE

BLOCK SHIFT VALUE

NUMBER OF ADDRESS

FOR ADDRESS

CYCLES

0xE3

512+16

0xE5

512+16

0xE6

512+16

0x39(1)

512+16

0x6B

512+16

0x73

512+16

0x33

512+16

0x75

512+16

0x35

512+16

0x43

512+16

0x45

512+16

0x53

512+16

0x55

512+16

0x76

512+16

0x36

512+16

0x79

512+16

0x71

512+16

0x46

512+16

0x56

512+16

0x74

512+16

0xF1

2048+64

0xA1

2048+64

0xAA

2048+64

0xDA

2048+64

0xAC

2048+64

0xDC

2048+64

0xB1

2048+64

0xC1

2048+64

(1)

Present only on silicon revision 1.1.

Detailed Device Description

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