TMS320DM355CZCEA13 datasheet(156/163 Pages) TI1

156 / 163 page

TMS320DM355

SPRS463G – SEPTEMBER 2007 – REVISED JUNE 2010

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5.18 IEEE 1149.1 JTAG

The JTAG(1) interface is used for BSDL testing and emulation of the DM355 device.

The DM355 device requires that both TRST and RESET be asserted upon power up to be properly

initialized. While RESET initializes the device, TRST initializes the device's emulation logic. Both resets

are required for proper operation.

While both TRST and RESET need to be asserted upon power up, only RESET needs to be released for

the device to boot properly. TRST may be asserted indefinitely for normal operation, keeping the JTAG

port interface and device's emulation logic in the reset state.

TRST only needs to be released when it is necessary to use a JTAG controller to debug the device or

exercise the device's boundary scan functionality. Note: TRST is synchronous and must be clocked by

TCK; otherwise, the boundary scan logic may not respond as expected after TRST is asserted.

RESET must be released only in order for boundary-scan JTAG to read the variant field of IDCODE

correctly. Other boundary-scan instructions work correctly independent of current state of RESET.

For maximum reliability, DM355 includes an internal pulldown (PD) on the TRST pin to ensure that TRST

will always be asserted upon power up and the device's internal emulation logic will always be properly

initialized.

JTAG controllers from Texas Instruments actively drive TRST high. However, some third-party JTAG

controllers may not drive TRST high but expect the use of a pullup resistor on TRST.

When using this type of JTAG controller, assert TRST to initialize the device after powerup and externally

drive TRST high before attempting any emulation or boundary scan operations. Following the release of

RESET, the low-to-high transition of TRST must be "seen" to latch the state of EMU1 and EMU0. The

EMU[1:0] pins configure the device for either Boundary Scan mode or Emulation mode. For more detailed

information, see the terminal functions section of this data sheet.

(1)

IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.

156

DM355 Peripheral Information and Electrical Specifications

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