SPC574K72E5 datasheet(71/127 Pages) STMICROELECTRONICS

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SPC574Kxx

Electrical characteristics

126

3.15.1

Power management integration

Use the integration scheme provided below to ensure proper device function.

Figure 19. Voltage regulator capacitance connection

The internal voltage regulator requires external capacitance (CREGn) to be connected to the

device to provide a stable low voltage digital supply to the device. Placed capacitances on

the board as near as possible to the associated pins and limit the serial inductance of the

board to less than 5 nH.

Place a decoupling capacitor between each VDD_LV supply pin and VSS ground plane to

ensure stable voltage. Place the capacitor as near as possible to the VDD_LV supply pin.

3.15.2

Main voltage regulator electrical characteristics

The device implements an internal voltage regulator to generate the low voltage core supply

VDD_LV from the high voltage ballast supply VDD_BV_PMC, internally connected to

VDD_HV_IO_MAIN supply. The regulator itself is supplied by VDD_HV_PMC. Both high voltage

supplies are common with VDD_HV_IO.

Note:

Refer to JPC5744M_IO_Signal.xls table for details regarding power connectivity.

DEVICE

VSS

VDD_HV_IO_MAIN

VDD_LV

CDECHV

VSS

VDD_LV

CDECREG2

DEVICE

VDD_LVn

VREF

VDD_HV_PMC

Voltage

VSS

VDD_LV

(LV_COR)

CREG

(LV_COR)

VDD_HV_PMC

CDECBV

(regulator supply decoupling)

Regulator

VSS

VDD_BV_PMC

(supplied via

VDD_IO_MAIN)

Note: The pins positions correspond to the pins positions in the pins package.

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