SPC574K72E5 datasheet(63/127 Pages) STMICROELECTRONICS

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SPC574Kxx

Electrical characteristics

126

3.12

Temperature sensor

The following table describes the temperature sensor electrical characteristics.

Calibration of gain is possible when gain = 1.



Offset Calibration should be done with respect to 0.5*VDD_HV_ADR for differential mode and single ended mode with

negative input=0.5*VDD_HV_ADR.

Offset Calibration should be done with respect to 0 for “single ended mode with negative input=0”.



Both offset and Gain Calibration is guaranteed for ±5% variation of VDD_HV_ADR, ±10% variation of VDD_HV_ADV, and ± 50

°C temperature variation.

Conversion offset error must be divided by the applied gain factor (1, 2, 4, 8, or 16) to obtain the actual input referred offset

error.

This parameter is guaranteed by bench validation with a small sample of devices across process variations, and tested in

production to a value of 3 dB less.

10. S/D ADC is functional in the range 3.6 V – 4.5 V, SNR parameter degrades by 3 dB. Degraded SNR value based on

simulation.

11. S/D ADC is functional in the range 3.0 – 4.5 V, SNR parameter degrades by 9 dB. Degraded SNR value based on

simulation.

12. This parameter is guaranteed by bench validation with a small sample of devices across process variations.

13. This parameter is guaranteed by bench validation with a small sample of devices across process variations.

14. Input impedance is valid over the full input frequency range.Input impedance is calculated in megaohms by the formula

25.6/(Gain * fADCD_M).

15. SNR values guaranteed only if external noise on the ADC input pin is attenuated by the required SNR value in the

frequency range of fADCD_M – fADCD_S to fADCD_M + fADCD_S, where fADCD_M is the input sampling frequency, and fADCD_S

is the output sample frequency. A proper external input filter should be used to remove any interfering signals in this

frequency range.

16. The ±1% passband ripple specification is equivalent to 20 * log10 (0.99) = 0.087 dB.

17. Propagation of the information from the pin to the register CDR[CDATA] and flags SFR[DFEF], SFR[DFFF] is given by the

different modules that need to be crossed: delta/sigma filters, high pass filter, fifo module, clock domain synchronizers. The

time elapsed between data availability at pin and internal S/D module registers is given by the below formula:



where fADCD_S is the frequency of the sampling clock, fADCD_M is the frequency of the modulator, and fPBRIDGEx_CLK

is the frequency of the peripheral bridge clock feeds to the ADC S/D module. The (~+1) symbol refers to the number of

clock cycles uncertainty (from 0 to 1 clock cycle) to be added due to resynchronization of the signal during clock domain

crossing.



Some further latency may be added by the target module (core, DMA, interrupt) controller to process the data received

from the ADC S/D module.

18. This capacitance does not include pin capacitance, that can be considered together with external capacitance, before

sampling switch.

19. Consumption is given after power-up, when steady state is reached. Extra consumption up to 2 mA may be required during

internal circuitry set-up.

Table 30. Temperature sensor electrical characteristics

Symbol

Parameter

Conditions

Value

Unit

Min

Typ

Max

—

Temperature monitoring range

—

–40

—

150

°C

TSENS

Sensitivity

—

5.18

—

mV/°C

TACC

Accuracy

TJ  150 °C

–3

—

°C

ITEMP_SENS

VDD_HV_ADV power supply

current

—

700

µA

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