MT9075B datasheet(54/78 Pages) MITEL

54 / 78 page

MT9075B

Preliminary Information

Per Time Slot Control Words (Pages 07H and 08H)

The control functions described by Table 69 are repeated for each PCM-30 channel. Page 07H addresses 10H to

1FH correspond to time slots 0 to 15, while page 08H addresses 10H to 1FH correspond to time slots 16 to 31.

Table 72 - Mapping to CEPT Channels

(Page 07H and 08H)

Table 73 - Per Time Slot Control Word

(Page 07H and 08H)

Page 07H Address:

012345678910

Equivalent

PCM

Timeslots

012345678910

Page 08H Address:

012345678910

Equivalent

PCM

Timeslots

Bit

Name

Functional Description

TXMSG

(0)

Transmit Message Mode. If one, the data from the corresponding

address location of Tx message mode buffer is transmitted in the

corresponding PCM 30 time slot. If zero, the data on DSTi is transmitted

on the corresponding PCM 30 time slot. Tx message mode buffer are

accessed from pages 0FH and 10H.

ADI

(0)

Alternate Digit Inversion. If one, the corresponding transmit time slot

data on DSTi has every second bit inverted, and the corresponding PCM

30 receive time slot has every second bit inverted. If zero, this bit has no

effect on channel data.

RTSL

(0)

Remote Time Slot Loopback. If one, the corresponding PCM 30

receive time slot is looped to the corresponding PCM 30 transmit time

slot. This received time slot will also be present on DSTo. If zero, the

loopback is disabled.

LTSL

(0)

Local Time Slot Loopback. If one, the corresponding transmit time slot

is looped to the corresponding receive time slot. This transmit time slot

will also be present on the transmit PCM 30 stream. If zero, this loopback

is disabled.

TTST

(0)

Transmit Test. If one and control bit ADSEQ (page 02H, address 13H)

is one, the A-law digital milliwatt will be transmitted in the corresponding

PCM 30 time slot. When one and ADSEQ is zero, a Pseudo-Random Bit

Sequence (PRBS 215-1) will be transmitted is the corresponding PCM 30

time slot. More than one time slot may be activated at once. If zero,

neither of these test signals will be connected to the corresponding time

slot.

RRST

(0)

Receive Test. If one and control bit ADSEQ (page 02H, address 13H) is

one, the A-law digital milliwatt will be transmitted in the corresponding

DSTo time slot. When one and ADSEQ is zero, a Pseudo Random Bit

Sequence (PRBS 215-1) receiver will be connected to the corresponding

time slot. This receiver circuit will synchronize to the transmit PRBS

signal and perform a bit comparison of the two sequences. If zero,

neither of these test signals will be connected to the corresponding time

slot.

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Unused.

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Unused.

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