AN4228 datasheet(35/90 Pages) STMICROELECTRONICS

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AN4228

Peripheral migration

3.16

CEC interface

The CEC interface is available only on STM32F37xx devices.

The STM32F3 series embeds a new CEC peripheral versus the STM32F1 series. The

architecture, features and programming interface are modified to introduce new capabilities.

As a consequence, the STM32F3 series CEC programming procedures and registers are

different from those of the STM32F1 series, so any code written for the STM32F1 series

using the CEC needs to be rewritten to run on STM32F3 series.

The STM32F3 series CEC provides best-in-class added features:



32 kHz CEC kernel with dual clock

–LSE

–

HSI/244



Reception in listen mode



Rx tolerance margin: standard or extended



Arbitration (signal free time): standard (by H/W) or aggressive (by S/W)



Arbitration lost detected flag/interrupt



Automatic transmission retry supported in case of arbitration lost



Multi-address configuration



Wake-up from STOP mode



Receive error detection

–

Bit rising error (with stop reception)

–

Short bit period error

–

Long bit period error



Configurable error bit generation

–

on bit rising error detection

–

on long bit period error detection



Transmission under run detection



Reception overrun detection

The following features present in the STM32F1 series are now handled by the new

STM32F3 series CEC features and thus are no more available.



Bit timing error mode & bit period error mode, by the new error handler



Configurable prescaler frequency divider, by the CEC fixed kernel clock

For more information about STM32F3 CEC features, please refer to CEC chapter of

STM32F37/38xx Reference Manual (RM0313).

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