MC9S08DZ96F2CLL datasheet(134/458 Pages) FREESCALE

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Chapter 6 Parallel Input/Output Control

MC9S08DZ128 Series Data Sheet, Rev. 1

134

Freescale Semiconductor

6.5.9.5

Port J Drive Strength Selection Register (PTJDS)

6.5.9.6

Port J Interrupt Status and Control Register (PTJSC)

76543210

PTJDS7

PTJDS6

PTJDS5

PTJDS4

PTJDS3

PTJDS2

PTJDS1

PTJDS0

Reset:

00000000

Figure 6-56. Drive Strength Selection for Port J Register (PTJDS)

Table 6-54. PTJDS Register Field Descriptions

Field

Description

7:0

PTJDS[7:0]

Output Drive Strength Selection for Port J Bits — Each of these control bits selects between low and high

output drive for the associated PTJ pin. For port J pins that are conﬁgured as inputs, these bits have no effect.

0 Low output drive strength selected for port J bit n.

1 High output drive strength selected for port J bit n.

76543210

0000

PTJIF

PTJIE

PTJMOD

PTJACK

Reset:

00000000

= Unimplemented or Reserved

Figure 6-57. Port J Interrupt Status and Control Register (PTJSC)

Table 6-55. PTJSC Register Field Descriptions

Field

Description

PTJIF

Port J Interrupt Flag — PTJIF indicates when a port J interrupt is detected. Writes have no effect on PTJIF.

0 No port J interrupt detected.

1 Port J interrupt detected.

PTJACK

Port J Interrupt Acknowledge — Writing a 1 to PTJACK is part of the ﬂag clearing mechanism. PTJACK always

reads as 0.

PTJIE

Port J Interrupt Enable — PTJIE determines whether a port J interrupt is requested.

0 Port J interrupt request not enabled.

1 Port J interrupt request enabled.

PTJMOD

Port J Detection Mode — PTJMOD (along with the PTJES bits) controls the detection mode of the port J

interrupt pins.

0 Port J pins detect edges only.

1 Port J pins detect both edges and levels.

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