AT90SCR100 datasheet(281/433 Pages) ATMEL

tên linh kiện	AT90SCR100

Giải thích chi tiết về linh kiện	8-bit Microcontroller for Smart Card Readers

PDF	433 Pages

Scroll/Zoom	100%

nhà sản xuất	ATMEL [ATMEL Corporation]

Trang chủ	http://www.atmel.com

Logo

281 / 433 page

281

TPR0327AY–SMS–30Jan09

AT90SCR100

21.2.2

SPI Controller Configured as a Slave

21.2.2.1

One byte sending using shift register (without DPRAM)

If the DPRAM is not activated (HSSPICFG.DPRAM bit cleared), the software may update the

contents of the HSSPI Transmit Data Register, SPITDR, that will be shifted out by incoming

clock pulses on the clock pin. As soon as the byte has been completely shifted, the Byte transfer

Done flag (HSSPIIR.BTD) is set. If global interrupt and the HSSPIIER.BTDIE bit have been previ-

ously set, an interrupt is generated.

At this stage, the Slave can read the HSSPIRDR register to retrieve the byte sent by the other

device. The HSSPICFG.BTD flag must then be cleared by software.

Figure 21-5.

HSSPI - Slave without DPRAM activated

Clear BTD (HSSPIIR)

(mandatory if IRQ mode)

Data to send?

YES

Wait SPICKRDY

(HSSPISR)

Write data to send

into HSSPITDR

Configure CPOL, CPHA,

MSTR=0,

SPIEN, DPRAM=0,

BTDIE (if IRQ mode)

Wait BTD

(HSSPIIR)

Data to receive?

Wait BTD

(HSSPIIR)

Read data from HSSPIRDR

YES

AT90SCR100 bảng dữ liệu(PDF) 281 Page - ATMEL Corporation