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AT90SCR100 bảng dữ liệu(PDF) 33 Page - ATMEL Corporation |
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AT90SCR100 bảng dữ liệu(HTML) 33 Page - ATMEL Corporation |
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33 / 433 page ![]() 33 TPR0327AY–SMS–30Jan09 AT90SCR100 7.1.7 Smart Card Interface Clock - clk SCI The Smart Card Interface clock is generated from clkMUX via a specific Divider described in the section “SCICLK - Smart Card Clock Register” on page 199. This means the SCIB is capable of operating at frequencies up to 12Mhz. 7.1.8 USB Clock - clkUSB The USB modules can only work if clkMUX = clkPLL. Then, an automatic divider by 2 is applied to reach the 48 Mhz. Both USB Device and USB Host Controller modules use clkUSB. 7.2 Clock Sources At chip startup, clkMUX = clkXTAL. The external clock must be a 8Mhz clock, and can be generated by either a crystal or an oscillator. The selection of the External Clock source is done by a fuse as shown below: Notes: 1. For all fuses “1” means unprogrammed while “0” means programmed. 7.2.1 Default Clock Source The device is shipped in “Low Power Crystal Oscillator” mode. The start-up time is set to maxi- mum and the time-out period enabled. Even if the AT90SCR100 core has swtiched to clkPLL, it can switch to clkXTAL again by clearing the PLLCR.PLLMUX bit. See “PLLCR – Phase Lock Loop (PLL) Control Register” on page 40. 7.2.2 Clock Startup Sequence Any clock source needs a sufficient VCC to start oscillating and a minimum number of oscillating cycles before it can be considered stable. To ensure sufficient VCC, the device issues an internal reset with a time-out delay (tTOUT) after the device reset is released by all other reset sources. The “On-chip Debug System” on page 48 describes the start conditions for the internal reset. The delay (tTOUT) is timed from the Watchdog Oscillator and the number of cycles in the delay is set by the SUTx and CKSELx fuse bits. The You can reduce AT90SCR100 consumption by disabling the clock input into SCIB, if you don’t need this peripheral. See “PRR1 – Power Reduction Register 1” on page 46 for details. Note You can reduce AT90SCR100 consumption by disabling the clock input into USB Device module and/or USB Host Module, if you don’t need these peripherals. See “PRR1 – Power Reduction Register 1” on page 46 for details. Note Table 7-1. Device Clocking Options Select (1) Device Clocking Option CKSEL3 Low Power Crystal Oscillator 1 External Clock 0 |
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