AT90SCR100 datasheet(60/433 Pages) ATMEL

60 / 433 page

TPR0327AY–SMS–30Jan09

AT90SCR100

9.6

9.6.1

MCUSR – MCU Status Register

The MCU Status Register provides information on which reset source caused an MCU reset.

• Bit 4 – JTRF: JTAG Reset Flag

This bit is set if a reset is being caused by a logic one in the JTAG Reset Register selected by

the JTAG instruction AVR_RESET. This bit is reset by a Power-on Reset, or by writing a logic

zero to the flag.

• Bit 3 – WDRF: Watchdog Reset Flag

This bit is set if a Watchdog Reset occurs. The bit is reset by a Power-on Reset, or by writing a

logic zero to the flag.

• Bit 2 – BORF: Brown-out Reset Flag

This bit is set if a Brown-out Reset occurs. The bit is reset by a Power-on Reset, or by writing a

logic zero to the flag.

• Bit 1 – EXTRF: External Reset Flag

This bit is set if an External Reset occurs. The bit is reset by a Power-on Reset, or by writing a

logic zero to the flag.

• Bit 0 – PORF: Power-on Reset Flag

This bit is set if a Power-on Reset occurs. The bit is reset only by writing a logic zero to the flag.

To make use of the Reset Flags to identify a reset condition, the user should read and then

Reset the MCUSR as early as possible in the program. If the register is cleared before another

reset occurs, the source of the reset can be found by examining the Reset Flags.

9.6.2

SMONCR – Supply Monitor Control Register

• Bit 7 – SMONIF: Supply Monitor Interrupt Flag

This bit is set by hardware when the external voltage Vcc drops below a Supply Monitor level.

If SMONIE and SREG.I bits are set, then an interrupt is triggered. This interrupt should allow

time to save important information, or cancel critical exchanges.

This bit must be cleared by software.

• Bit 6 – SMONIE: Supply Monitor Interrupt Enable

Bit

7654

0x34 (0x54)

JTRF

WDRF

BORF

EXTRF

PORF

MCUSR

Read/write

R/W

Initial value

See Bit Description

Bit

7654

0x0063

SMONIF SMONIE

SMONEN SMONCR

Read/write

R/W

Initial value

0000

0x00

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