AT90SCR100 datasheet(71/433 Pages) ATMEL

71 / 433 page

TPR0327AY–SMS–30Jan09

AT90SCR100

is executed. Alternatively, the flag can be cleared by writing a logical one to it. These flags are

always cleared when INT3:0 are configured as level interrupt.

11.1.4

EIRR – External Interrupt Redirection Register

• Bit 3 – INTD3 : External Interruption 3 Direction

This bit is set and cleared by software. Please see the table below for bit description:

• Bit 2 – INTD2 : External Interruption 2 Direction

This bit is set and cleared by software.

11.1.5

PCICR – Pin Change Interrupt Control Register

• Bit 3 – PCIE3 : Pin Change Interrupt Enable 3

When the PCIE3 bit is set (one) and the I-bit in the Status Register (SREG) is set (one), pin

change interrupt 3 is enabled. Any change on any enabled PCINT31:24 pin will cause an inter-

rupt. The corresponding interrupt of the Pin Change Interrupt Request is executed from the PCI3

Interrupt Vector. PCINT31:24 pins are enabled individually by the PCMSK3 Register.

• Bit 2 – PCIE2 : Pin Change Interrupt Enable 2

When the PCIE2 bit is set (one) and the I-bit in the Status Register (SREG) is set (one), pin

change interrupt 2 is enabled. Any change on any enabled PCINT23:16 pin will cause an inter-

When entering sleep mode with the INT3:0 interrupts disabled, the input buffers on

these pins will be disabled. This may cause a logic change in internal signals

which will set the INTF3:0 flags. See “Digital Input Enable and Sleep Modes” on

page 81 for more information.

Note

Bit

6543210

0x1A (0x3A)

----

INTD3

INTD2

EIRR

Read/write

RRRR

R/W

Initial value

0x00

Table 11-3.

External Interruption 3 Pad location

INTD3

Interruption 3 Pad

Description

PB1

INT3 active, INT3b inactive

PC1

INT3 inactive, INT3b active

Table 11-4.

External Interruption 2 Pad location

INTD3

Interruption 3 Pad

Description

PB0

INT2 active, INT2b inactive

PC0

INT2 inactive, INT2b active

Bit

6543210

0x68

----

PCIE3

PCIE2

PCIE1

PCIE0

PCICR

Read/write

RRRR

R/W

Initial value

0x00

AT90SCR100 bảng dữ liệu(PDF) 71 Page - ATMEL Corporation

AT90SCR100 bảng dữ liệu(HTML) 71 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL