AT90SCR100 datasheet(32/433 Pages) ATMEL

32 / 433 page

TPR0327AY–SMS–30Jan09

AT90SCR100

7.1.1

AVR Core Clock - clk

Core

The Core clock is providing clock to all the systems linked with the AVR Core. The CPU and

some peripherals, such as Timers, USART, SPI, TWI, Keyboard interface and AES are directly

connected to the clkCore.

Clock divisions performed by the Core Divider will also affect clkI/O and clkTIM (depending on the

Timer Controller Clock selection).

Please see “CLKPR – Clock Prescale Register” on page 40 for Core Divider access

descriptions.

7.1.2

CPU Clock - clk

CPU

The CPU clock is routed to parts of the system concerned with operation of the AVR core.

Examples of such modules are the General Purpose Register File, the Status Register and the

data memory holding the Stack Pointer. Halting the CPU clock inhibits the core from performing

general operations and calculations.

7.1.3

I/O Clock - clk

I/O

The I/O clock is used by the majority of the I/O modules, like Timer/Counters, SPI, and USART.

The I/O clock is also used by the External Interrupt module, but note that some external inter-

rupts are detected by asynchronous logic, allowing such interrupts to be detected even if the I/O

clock is halted.

7.1.4

Memory Clock - clk

Flash and clkWrite_Flash

The Memory clock controls operation of the Flash interface.

The clkFlash is usually active simultaneously with the CPU clock, and is used to read and execute

code from Flash, and read data from EEPROM.

The clkWrite_Flash is generated independently, and is used for all Flash and EEPROM write proce-

dures. The section “Internal RC Oscillator” on page 37 gives more information about this private

clock.

7.1.5

Asynchronous Timer Clock – clk

ASY

The Asynchronous Timer clock allows the Asynchronous Timer/Counter to be clocked directly

from an external clock or an external 32 kHz clock crystal. The dedicated clock domain allows

this Timer/Counter to be used as a real-time counter even when the device is in sleep mode.

7.1.6

High-Speed SPI Clock - clk

HSSPI

The High-Speed SPI does not use the clkcpu. Using the clkMUX, through specific dividers, the

High-Speed SPI can work to frequencies higher than CPU’s one. Please see “HSSPIIER -

HSSPI Interrupt Enable Register” on page 289, for details about divider description.

You can choose to disable a peripheral by cutting the clock supplying it. This will

reduce the consumption of the AT90SCR100. Please refer to “PRR0 – Power

Reduction Register 0” on page 45 and “PRR1 – Power Reduction Register 1” on

page 46.

Note

You can reduce AT90SCR100 consumption by disabling the clock input into

HSSPI, if you don’t need this peripheral. See “PRR1 – Power Reduction Register

1” on page 46 for details.

Note

AT90SCR100 bảng dữ liệu(PDF) 32 Page - ATMEL Corporation

AT90SCR100 bảng dữ liệu(HTML) 32 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL