AT90SCR100 datasheet(89/433 Pages) ATMEL

89 / 433 page

TPR0327AY–SMS–30Jan09

AT90SCR100

when using the register or bit defines in a program, the precise form must be used, i.e., TCNT0

for accessing Timer/Counter0 counter value and so on.

The definitions in Table 13-1 are also used extensively throughout the document.

13.1.2

Timer/Counter Clock Sources

The Timer/Counter can be clocked by an internal or an external clock source. The clock source

is selected by the Clock Select logic which is controlled by the Clock Select (CS02:0) bits

located in the Timer/Counter Control Register (TCCR0B). For details on clock sources and pres-

caler, see “Timer/Counter Prescaler” on page 154.

13.1.3

Counter Unit

The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit. Figure

13-2 shows a block diagram of the counter and its surroundings.

Figure 13-2.

Counter Unit Block Diagram

Signal description (internal signals):

count

Increment or decrement TCNT0 by 1.

direction

Select between increment and decrement.

clear

Clear TCNT0 (set all bits to zero).

clk

Timer/Counter clock, referred to as clkT0 in the following.

top

Signifies that TCNT0 has reached maximum value.

bottom

Signifies that TCNT0 has reached minimum value (zero).

Depending on the mode of operation used, the counter is cleared, incremented, or decremented

at each timer clock (clkT0). clkT0 can be generated from an external or internal clock source,

selected by the Clock Select bits (CS02:0). When no clock source is selected (CS02:0 = 0) the

timer is stopped. However, the TCNT0 value can be accessed by the CPU, regardless of

Table 13-1.

Definitions

BOTTOM

The counter reaches the BOTTOM when it becomes 0x00.

MAX

The counter reaches its MAXimum when it becomes 0xFF (decimal 255).

TOP

The counter reaches the TOP when it becomes equal to the highest value in the

count sequence. The TOP value can be assigned to be the fixed value 0xFF

(MAX) or the value stored in the OCR0A Register. The assignment is depen-

dent on the mode of operation.

DATA BUS

TCNT0

Control Logic

count

TOV0

(Int.Req.)

Clock Select

top

Edge

Detector

( From Prescaler )

clk

bottom

direction

clear

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