TBD datasheet(47/80 Pages) FREESCALE

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Electrical Characteristics

MSC8144E Quad Core Digital Signal Processor Data Sheet, Rev. 6

Freescale Semiconductor

2.7.5.6

Receiver Eye Diagrams

For each baud rate at which an LP-Serial receiver is specified to operate, the receiver shall meet the corresponding bit error rate

specification (Table 37, Table 38, and Table 39) when the eye pattern of the receiver test signal (exclusive of sinusoidal jitter)

falls entirely within the unshaded portion of the receiver input compliance mask shown in Figure 15 with the parameters

specified in Table 40. The eye pattern of the receiver test signal is measured at the input pins of the receiving device with the

device replaced with a 100

Ω ±5% differential resistive load.

Bit Error Rate

BER

10–12

Unit Interval

320

±100 ppm

Figure 14. Single Frequency Sinusoidal Jitter Limits

Table 39. Receiver AC Timing Specifications—3.125 GBaud (continued)

Characteristic

Symbol

Range

Unit

Notes

Min

Max

8.5 UI p-p

0.10 UI p-p

Sinusoidal

Jitter

Amplitude

22.1 kHz

1.875 MHz

20 MHz

Frequency

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