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EB632 bảng dữ liệu(PDF) 20 Page - Freescale Semiconductor, Inc

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Giải thích chi tiết về linh kiện  Functional Differences Between MSC8101 (Mask 2K42A) and MSC8103 (Mask 2K87M)
PDF  112 Pages
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nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
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EB632 bảng dữ liệu(HTML) 20 Page - Freescale Semiconductor, Inc

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Functional Differences Between MSC8101 (Mask 2K42A) and MSC8103 (Mask 2K87M), Rev. 2
20
Freescale Semiconductor
Clock System
22
010
110
Reserved
23
010
111
Reserved
24
011
000
2
12
6
6
2
3
12
1 : 3 : 4
1
25
011
001
1
12
6
3
2
5
10
1 : 3 : 4
2
26
011
010
1
18
6
3
2
5
10
1 : 3 : 4
3
27
011
011
2
10
5
3
2
5
12
1 : 2.5 : 4
1
28
011
100
Reserved
29
011
101
Reserved
30
011
110
Reserved
31
011
111
2
12
6
8
2
3
12
1 : 3 : 3
1
32
100
000
Reserved
33
100
001
2
16
8
8
4
2
10
1 : 2 : 5
1
34
100
010
1
12
4
4
2
2
10
1 : 2 : 5
3
35
100
011
2
16
8
8
4
2
12
1 : 2 : 6
1
36
100
100
1
16
8
8
4
2
12
1 : 2 : 6
2
37
100
101
Reserved
38
100
110
Reserved
39
100
111
Reserved
40
101
000
Reserved
41
101
001
Reserved
42
101
010
Reserved
43
101
011
Reserved
44
101
100
Reserved
45
101
101
Reserved
463
101
110
216
4
2
2
510
1 : 2 : 4
2
47
101
111
Reserved
48
110
000
Reserved
49
110
001
Reserved
50
110
010
Reserved
51
110
011
Reserved
52
110
100
Reserved
53
110
101
Reserved
54
110
110
Reserved
55
110
111
Reserved
56
111
000
Reserved
573
111
001
2
10
5
5
2
2
10
1 : 2.5 : 5
1
58
111
010
Reserved
59
111
011
Reserved
60
111
100
Reserved
61
111
101
Reserved
62
111
110
Reserved
63
111
111
Reserved
Notes:
1.
MODCK_H is a 3-bit field that occupies bits 28–30 of the Hard Reset Configuration Word. The bits are listed in the table in the
following order: bit 28, bit 29, bit 30. For example, the value 110 indicates that bit 28 = 1, bit 29 = 1, and bit 30 = 0.
2.
MODCK[1–3] are external signal inputs that are either pulled up (1) or pulled down (0) to configure the system clock mode. The
values are listed in the table in the following order: MODCK1, MODCK2, MODCK3. For example, the value 110 indicates that
MODCK1 is pulled up, MODCK2 is pulled up, and MODCK3 is pulled down.
3.
This mode is compatible with the same mode for mask set 2K42A.
Table 14. 2K87M Mask Set Clock Configuration Modes (Continued)
Mode #
MODCK_H1
MODCK[1–3]2
SPLL
PDF
SPLL
MF
Bus
DF
Core
DF
CPM
DF
CPLL
PDF
CPLL
MF
Ratio
Bus:CPM:Core
Bus/
CLKIN



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