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EB632 bảng dữ liệu(PDF) 38 Page - Freescale Semiconductor, Inc

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Giải thích chi tiết về linh kiện  Functional Differences Between MSC8101 (Mask 2K42A) and MSC8103 (Mask 2K87M)
PDF  112 Pages
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EB632 bảng dữ liệu(HTML) 38 Page - Freescale Semiconductor, Inc

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Functional Differences Between MSC8101 (Mask 2K42A) and MSC8103 (Mask 2K87M), Rev. 2
38
Freescale Semiconductor
CPM
RCCR configures the CP to run microcode from ROM or RAM and controls the CP internal timer.
Table 32. 2K87M Mask Set RCCR Bit Descriptions
Name
Reset
Description
Settings
TIME
0
0
Timer Enable
Enables the CP internal timer that generates a tick to
the CP based on the value programmed into the
TIMEP field. TIME can be modified at any time to start
or stop the scanning of the RISC timer tables.
0
Timer disabled
1
Timer enabled
—
1
0
Reserved. Write to zero for future compatibility.
TIMEP
2–7
0
Timer Period
Controls the CP timer tick. The RISC timer tables are
scanned on each timer tick, and the input to the timer
tick generator is the general system clock (150 MHz)
divided by 1,024. The formula is (TIMEP + 1)
× 1,024
= (general system clock period). Thus, a value of 0
stored in these bits gives a timer tick of 1
× (1,024) =
1,024 general system clocks and a value of 63
(decimal) gives a timer tick of 64
× (1,024) = 65,536
general system clocks.
EXT
[1–2]M
8–9
0
External Request Mode
Controls the external request sensitivity
Note:
Reserved for future microcode applications.
0
EXT
x is edge sensitive according to EDMx
1
EXT
x is level sensitive according to EDMx
EXT1P
10–11
0
External Request Priority
Controls the external request priority relative to
communication controllers
Note:
Reserved for future microcode applications.
00
EXT
x has higher priority than the
communication
controllers (default)
01
EXT
x has lower priority than the
communications
controllers
10
EXT
x has the lowest priority
11
Reserved
—
12
0
Reserved. Write to zero for future compatibility.
SCD
13
0
Scheduler Configuration
Configure as instructed in the download process of a
Freescale-supplied RAM microcode package.
0
Normal operation
1
Alternate configuration of the scheduler
EXT2P
14–15
0
External Request Priority
Controls the external request priority relative to
communication controllers
Note:
Reserved for future microcode applications.
00
EXT
x has higher priority than the
communication
controllers (default)
01
EXT
x has lower priority than the
communications
controllers
10
EXT
x has the lowest priority
11
Reserved



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