EB632 datasheet(47/112 Pages) FREESCALE

47 / 112 page

CPM

Functional Differences Between MSC8101 (Mask 2K42A) and MSC8103 (Mask 2K87M), Rev. 2

Freescale Semiconductor

The FIFO management includes emptying cells from the transmit FIFO, indicating to the UTOPIA interface that it

is full, maintaining the FIFO read and write pointers, and detecting FIFO underrun (TCER[UR]) conditions.

14.4.9 Rx UTOPIA Interface

T he receive interface with the FCC via the UTOPIA bus implements the UTOPIA level-2 (multi-PHY) 8-bit PMD

side (slave) interface.

14.4.10 Tx UTOPIA Interface

T he transmit interface with the FCC via the UTOPIA bus implements the UTOPIA level-2 (multi-PHY) 8-bit

PMD side (slave) interface.

14.4.11 TC Layer Registers

Each TC layer block is controlled by registers in the block and accessed from the 60x-compatible bus.

14.4.12 TC Layer Mode Register (TCMODE)

Each TC layer block is configured using a TC layer mode register TCMODEx, as shown in Figure 18.

Table 34 describes TCMODE fields.

Bit

0123

4567

Field

RXEN

TXEN

RPS

TPS

SBC

URE

TBA

IMA

Reset

0000

000

R/W

Figure 18. TCMODEx

Table 34. TCMODE Field Descriptions

Name

Description

Settings

RXEN

TC Layer Receive Enable

Enables the TC Layer Rx block operation

TC Layer Rx operation disabled

TC Layer Rx operation enabled

TXEN

TC Layer Transmit Enable

Enables the TC Layer Tx block operation

TC Layer Tx operation disabled

TC Layer Tx operation enabled

RPS

Receive Payload Descrambling Disable

Disables payload descrambling on received payload data

Received payload descrambling

No received payload descrambling

TPS

Transmit Payload Scrambling Disable

Disables payload scrambling on transmitted payload data

Transmit payload scrambling

No transmit payload scrambling

Receive Coset Disable

Disables XOR with 0xAA on received HEC

XOR with 0xAA on received HEC

No XOR with 0xAA on received HEC

Transmit Coset Disable

Disables XOR with 0xAA on transmitted HEC

XOR with 0xAA on transmitted HEC

No XOR with 0xAA i on transmitted

HEC

SBC

Header Single Bit error Correction Disable

Disables single bit correction on the header according to HEC in Sync mode.

Single bit error correction

No single bit error correction

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