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SH79F024XU bảng dữ liệu(PDF) 74 Page - SINOWEALTH Electronic Ltd |
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SH79F024XU bảng dữ liệu(HTML) 74 Page - SINOWEALTH Electronic Ltd |
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74 / 92 page ![]() SH79F SH79F SH79F SH79F082 082 082 082 74 8. 8. 8. 8.7 7 7 7 Watchdog Watchdog Watchdog Watchdog Timer Timer Timer Timer (WDT) (WDT) (WDT) (WDT) and and and and R R R Reset eset eset eset S S S State tate tate tate 8. 8. 8. 8.7 7 7 7.1 .1 .1 .1 Feature Feature Feature Feature � Auto detect Program Counter (PC) over range, and generate OVL Reset � WDT runs even in the Power-Down mode � Selectable different WDT overflow frequency OVL OVL OVL OVL Reset Reset Reset Reset To enhance the anti-noise ability, SH79F082 built in Program Counter(PC)over range detect circuit, if program counter value is larger than flash romsize, or detect operation code equal to A5H which is not exist in 8051 instruction set, a OVL reset will be generate to reset CPU, and set WDOF bit. So, to make use of this feature, you should fill unused flash rom with A5H. The watchdog timer is a down counter, and its clock source is an independent built-in RC oscillator, so it always runs even in the Power-Down mode. The watchdog timer will generate a device reset when it overflows. It can be enabled or disabled permanently by the code option. The watchdog timer control bits (WDT.2-0) are used to select different overflow frequency. The watchdog timer overflow flag (WDOF) will be automatically set to “1” by hardware when overflow happens. To prevent overflow happen, by reading or writing the WDT register RSTSTAT, the watchdog timer should re-count before the overflow happens. There are also some reset flags in this register as below: |
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