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SH79F024XU bảng dữ liệu(PDF) 35 Page - SINOWEALTH Electronic Ltd |
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SH79F024XU bảng dữ liệu(HTML) 35 Page - SINOWEALTH Electronic Ltd |
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35 / 92 page  SH79F SH79F SH79F SH79F082 082 082 082 35 7.8 7.8 7.8 7.8 Interrupt Interrupt Interrupt Interrupt 7.8.1 7.8.1 7.8.1 7.8.1 Feature Feature Feature Feature � 9 interrupt sources � 4 interrupt priority levels The SH79F082 provides total 9 interrupt sources: 3 external interrupts (INT0/1/4; INT4 including INT40-41, which share the same vector address), two timer interrupts (timer 0, 1), one EUART interrupt, ADC Interrupt, Fault detect interrupt, PWM interrupts. The SH79F082 uses a four-priority level interrupt structure. This allows great flexibility in controlling the handling of the internal interrupt sources. Also, SH79F082 provides 4 ways to trigger external interrupt 4, which can be selected by register. 7.8.2 7.8.2 7.8.2 7.8.2 Interrupt Interrupt Interrupt Interrupt Enable Enable Enable Enable C C C Control ontrol ontrol ontrol Each interrupt source can be individually enabled or disabled by setting or clearing the corresponding bit in the interrupt enable registers IEN0 or IEN1. The IEN0 register also contains global interrupt enable bit, EA, which can enable/disable all the interrupts at once. Generally, after reset, all interrupt enable bits are set to 0, which means that all the interrupts are disabled. Table Table Table Table 7 7 7 7....25 25 25 25 Primary Interrupt Enable Register A8H A8H A8H A8H Bit7 Bit7 Bit7 Bit7 Bit6 Bit6 Bit6 Bit6 Bit5 Bit5 Bit5 Bit5 Bit4 Bit4 Bit4 Bit4 Bit3 Bit3 Bit3 Bit3 Bit2 Bit2 Bit2 Bit2 Bit1 Bit1 Bit1 Bit1 Bit0 Bit0 Bit0 Bit0 IEN0 IEN0 IEN0 IEN0 EA EADC - ES ET1 EX1 ET0 EX0 R/W R/W R/W R/W R/W R/W - R/W R/W R/W R/W R/W Reset Reset Reset Reset Value Value Value Value ((((POR/WDT/LVR/PIN POR/WDT/LVR/PIN POR/WDT/LVR/PIN POR/WDT/LVR/PIN)))) 0 0 - 0 0 0 0 0 Bit Bit Bit Bit Number Number Number Number Bit Bit Bit Bit Mnemonic Mnemonic Mnemonic Mnemonic Description Description Description Description 7 7 7 7 EA EA EA EA A A A All ll ll ll interrupt interrupt interrupt interrupt enable enable enable enable bit bit bit bit 0: Disable all interrupt 1: Enable all interrupt 6 6 6 6 EADC EADC EADC EADC ADC ADC ADC ADC interrupt interrupt interrupt interrupt enable enable enable enable bit bit bit bit 0: Disable ADC interrupt 1: Enable ADC interrupt 4 4 4 4 ES ES ES ES EUART EUART EUART EUART interrupt interrupt interrupt interrupt enable enable enable enable bit bit bit bit 0: Disable EUART interrupt 1: Enable EUART interrupt 3 3 3 3 ET1 ET1 ET1 ET1 Timer1 Timer1 Timer1 Timer1 overflow overflow overflow overflow interrupt interrupt interrupt interrupt enable enable enable enable bit bit bit bit 0: Disable timer 1 overflow interrupt 1: Enable timer 1 overflow interrupt 2 2 2 2 EX1 EX1 EX1 EX1 External External External External interrupt interrupt interrupt interrupt 1 1 1 1 enable enable enable enable bit bit bit bit 0: Disable external interrupt 1 1: Enable external interrupt 1 1 1 1 1 ET0 ET0 ET0 ET0 Timer0 Timer0 Timer0 Timer0 overflow overflow overflow overflow interrupt interrupt interrupt interrupt enable enable enable enable bit bit bit bit 0: Disable timer 0 overflow interrupt 1: Enable timer 0 overflow interrupt 0 0 0 0 EX0 EX0 EX0 EX0 External External External External interrupt interrupt interrupt interrupt 0 0 0 0 enable enable enable enable bit bit bit bit 0: Disable external interrupt 0 1: Enable external interrupt 0 |
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