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SH79F024XU bảng dữ liệu(PDF) 25 Page - SINOWEALTH Electronic Ltd |
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SH79F024XU bảng dữ liệu(HTML) 25 Page - SINOWEALTH Electronic Ltd |
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25 / 92 page  SH79F SH79F SH79F SH79F082 082 082 082 25 7.6 7.6 7.6 7.6 I/O I/O I/O I/O Port Port Port Port 7.6.1 7.6.1 7.6.1 7.6.1 Feature Feature Feature Feature � 22 bi-directional I/O ports � Share with alternative functions The SH79F082 has 22 bi-directional I/O ports. The PORT data is put in Px register. The PORT control register (PxCRy) controls the PORT as input or output. Each I/O port has an internal pull-high resistor, which is controlled by PxPCRy when the PORT is used as input (x = 0-3, y = 0-7). For SH79F082, some I/O pins can share with alternative functions. There exists a priority rule in CPU to avoid these functions be conflict when all the functions are enabled. (Refer to Port Port Port Port Share Share Share Share Section for details). 7.6.2 7.6.2 7.6.2 7.6.2 Register Register Register Register Table Table Table Table 7 7 7 7....14 14 14 14 Port Control Register Table Table Table Table 7 7 7 7....15 15 15 15 Port Pull up Resistor Control Register Note: Note: Note: Note: The bit7 of P0, The bit6 and 7 of P1, The bit0, 3 and 7 of P2, The bit0 and 3 of P3, they mast be set as input and enable internal resister, otherwise chip will happen leakage current. E1H E1H E1H E1H ---- E E E E4 4 4 4H H H H Bit7 Bit7 Bit7 Bit7 Bit6 Bit6 Bit6 Bit6 Bit5 Bit5 Bit5 Bit5 Bit4 Bit4 Bit4 Bit4 Bit3 Bit3 Bit3 Bit3 Bit2 Bit2 Bit2 Bit2 Bit1 Bit1 Bit1 Bit1 Bit0 Bit0 Bit0 Bit0 P0CR P0CR P0CR P0CR (E1H) (E1H) (E1H) (E1H) - P0CR.6 P0CR.5 P0CR.4 P0CR.3 P0CR.2 P0CR.1 P0CR.0 P1CR P1CR P1CR P1CR (E2H) (E2H) (E2H) (E2H) - - P1CR.5 P1CR.4 P1CR.3 P1CR.2 P1CR.1 P1CR.0 P2CR P2CR P2CR P2CR (E3H) (E3H) (E3H) (E3H) - P2CR.6 P2CR.5 P2CR.4 - P2CR.2 P2CR.1 - P3CR P3CR P3CR P3CR (E4H) (E4H) (E4H) (E4H) - - P3CR.5 P3CR.4 - P3CR.2 P3CR.1 - R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Reset Reset Reset Reset Value Value Value Value ((((POR/WDT/LVR POR/WDT/LVR POR/WDT/LVR POR/WDT/LVR/PIN /PIN /PIN /PIN)))) - 0 0 0 0 0 0 0 Bit Bit Bit Bit Number Number Number Number Bit Bit Bit Bit Mnemonic Mnemonic Mnemonic Mnemonic Description Description Description Description 7-0 7-0 7-0 7-0 Px Px Px PxC C C CR R R R....y y y y x x x x = = = = 0 0 0 0-3 -3 -3 -3,,,, y y y y = = = = 0 0 0 0----7 7 7 7 Port Port Port Port input/output input/output input/output input/output direction direction direction direction control control control control Register Register Register Register 0: input mode 1: output mode E9H- E9H- E9H- E9H- E E E EC C C CH H H H Bit7 Bit7 Bit7 Bit7 Bit6 Bit6 Bit6 Bit6 Bit5 Bit5 Bit5 Bit5 Bit4 Bit4 Bit4 Bit4 Bit3 Bit3 Bit3 Bit3 Bit2 Bit2 Bit2 Bit2 Bit1 Bit1 Bit1 Bit1 Bit0 Bit0 Bit0 Bit0 P0PCR P0PCR P0PCR P0PCR (E9H) (E9H) (E9H) (E9H) - P0PCR.6 P0PCR.5 P0PCR.4 P0PCR.3 P0PCR.2 P0PCR.1 P0PCR.0 P1PCR P1PCR P1PCR P1PCR (EAH) (EAH) (EAH) (EAH) - - P1PCR.5 P1PCR.4 P1PCR.3 P1PCR.2 P1PCR.1 P1PCR.0 P2PCR P2PCR P2PCR P2PCR (EBH) (EBH) (EBH) (EBH) - P2PCR.6 P2PCR.5 P2PCR.4 - P2PCR.2 P2PCR.1 - P3PCR P3PCR P3PCR P3PCR (ECH) (ECH) (ECH) (ECH) - - P3PCR.5 P3PCR.4 - P3PCR.2 P3PCR.1 - R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Reset Reset Reset Reset Value Value Value Value (POR/WDT/LVR (POR/WDT/LVR (POR/WDT/LVR (POR/WDT/LVR/PIN /PIN /PIN /PIN)))) - 0 0 0 0 0 0 0 Bit Bit Bit Bit Number Number Number Number Bit Bit Bit Bit Mnemonic Mnemonic Mnemonic Mnemonic Description Description Description Description 7-0 7-0 7-0 7-0 Px Px Px PxP P P PCR CR CR CR....y y y y x x x x = = = = 0- 0- 0- 0-3 3 3 3,,,, y y y y = = = = 0-7 0-7 0-7 0-7 Input Input Input Input Port Port Port Port internal internal internal internal pull-high pull-high pull-high pull-high resistor resistor resistor resistor enable/disable enable/disable enable/disable enable/disable control control control control 0: internal pull-high resistor disabled 1: internal pull-high resistor enabled |
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