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SH79F024XU bảng dữ liệu(PDF) 65 Page - SINOWEALTH Electronic Ltd |
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SH79F024XU bảng dữ liệu(HTML) 65 Page - SINOWEALTH Electronic Ltd |
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65 / 92 page  SH79F SH79F SH79F SH79F082 082 082 082 65 Table Table Table Table 8 8 8 8....18 18 18 18 EUART Data Buffer Register Table Table Table Table 8 8 8 8....19 19 19 19 EUART Slave Address & Address Mask Register 99 99 99 99H H H H Bit7 Bit7 Bit7 Bit7 Bit6 Bit6 Bit6 Bit6 Bit5 Bit5 Bit5 Bit5 Bit4 Bit4 Bit4 Bit4 Bit3 Bit3 Bit3 Bit3 Bit2 Bit2 Bit2 Bit2 Bit1 Bit1 Bit1 Bit1 Bit0 Bit0 Bit0 Bit0 SBUF SBUF SBUF SBUF SBUF.7 SBUF.6 SBUF.5 SBUF.4 SBUF.3 SBUF.2 SBUF.1 SBUF.0 R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Reset Reset Reset Reset Value Value Value Value ((((POR/WDT/LVR POR/WDT/LVR POR/WDT/LVR POR/WDT/LVR/PIN /PIN /PIN /PIN)))) 0 0 0 0 0 0 0 0 Bit Bit Bit Bit Number Number Number Number Bit Bit Bit Bit Mnemonic Mnemonic Mnemonic Mnemonic Description Description Description Description 7-0 7-0 7-0 7-0 SBUF.7-0 SBUF.7-0 SBUF.7-0 SBUF.7-0 This SFR accesses two registers; a transmit shift register and a receive latch register A write of SBUF will send the byte to the transmit shift register and then initiate a transmission A read of SBUF returns the contents of the receive latch 9AH-9BH 9AH-9BH 9AH-9BH 9AH-9BH Bit7 Bit7 Bit7 Bit7 Bit6 Bit6 Bit6 Bit6 Bit5 Bit5 Bit5 Bit5 Bit4 Bit4 Bit4 Bit4 Bit3 Bit3 Bit3 Bit3 Bit2 Bit2 Bit2 Bit2 Bit1 Bit1 Bit1 Bit1 Bit0 Bit0 Bit0 Bit0 SADDR SADDR SADDR SADDR SADDR.7 SADDR.6 SADDR.5 SADDR.4 SADDR.3 SADDR.2 SADDR.1 SADDR.0 SADEN SADEN SADEN SADEN SADEN.7 SADEN.6 SADEN.5 SADEN.4 SADEN.3 SADEN.2 SADEN.1 SADEN.0 R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Reset Reset Reset Reset Value Value Value Value ((((POR/WDT/LVR POR/WDT/LVR POR/WDT/LVR POR/WDT/LVR/PIN /PIN /PIN /PIN)))) 0 0 0 0 0 0 0 0 Bit Bit Bit Bit Number Number Number Number Bit Bit Bit Bit Mnemonic Mnemonic Mnemonic Mnemonic Description Description Description Description 7-0 7-0 7-0 7-0 SADDR.7-0 SADDR.7-0 SADDR.7-0 SADDR.7-0 SFR SFR SFR SFR SADDR SADDR SADDR SADDR defines defines defines defines the the the the EUART EUART EUART EUART’’’’s s s s slave slave slave slave address address address address 7-0 7-0 7-0 7-0 SADEN.7-0 SADEN.7-0 SADEN.7-0 SADEN.7-0 SFR SFR SFR SFR SADEN SADEN SADEN SADEN is is is is a a a a bit bit bit bit mask mask mask mask to to to to determine determine determine determine which which which which bits bits bits bits of of of of SADDR SADDR SADDR SADDR are are are are checked checked checked checked against against against against a a a a received received received received address address address address 0: Corresponding bit in SADDR is a “don’t care” 1: Corresponding bit in SADDR is checked against a received address |
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