CY7C65013
CY7C65113
Document #: 38-08002 Rev. *B
Page 11 of 51
4.3
Instruction Set Summary
Refer to the CYASM Assembler User’s Guide for more details. Note that conditional jump instructions (i.e. JC, JNC, JZ, JNZ)
take five cycles if jump is taken, four cycles if no jump.
Reserved
0x30
Reserved
Reserved
0x31
Reserved
Reserved
0x32
Reserved
Reserved
0x38-0x3F
Reserved
USB Device Address B
0x40
R/W
USB Device Address B (not used in 5-endpoint mode) 36
EP B0 Counter Register
0x41
R/W
USB Address B, Endpoint 0 Counter
38
EP B0 Mode Register
0x42
R/W
USB Address B, Endpoint 0 Configuration, or
USB Address A, Endpoint 3 in 5-endpoint mode
37
EP B1 Counter Register
0x43
R/W
USB Address B, Endpoint 1 Counter
38
EP B1 Mode Register
0x44
R/W
USB Address B, Endpoint 1 Configuration, or
USB Address A, Endpoint 4 in 5-endpoint mode
38
Hub Port Connect Status
0x48
R/W
Hub Downstream Port Connect Status
31
Hub Port Enable
0x49
R/W
Hub Downstream Ports Enable
32
Hub Port Speed
0x4A
R/W
Hub Downstream Ports Speed
31
Hub Port Control (Ports [4:1])
0x4B
R/W
Hub Downstream Ports Control (Ports [4:1])
33
Hub Port Control (Ports [7:5])
0x4C
R/W
Hub Downstream Ports Control (Ports [7:5])
33
Hub Port Suspend
0x4D
R/W
Hub Downstream Port Suspend Control
34
Hub Port Resume Status
0x4E
R
Hub Downstream Ports Resume Status
35
Hub Ports SE0 Status
0x4F
R
Hub Downstream Ports SE0 Status
33
Hub Ports Data
0x50
R
Hub Downstream Ports Differential Data
34
Hub Downstream Force Low
0x51
R/W
Hub Downstream Ports Force LOW (Ports [1:4])
33
Hub Downstream Force High
0x52
R/W
Hub Downstream Ports Force HIGH (Ports [5:7])
33
Processor Status & Control
0xFF
R/W
Microprocessor Status and Control Register
24
Table 4-3. Instruction Set Summary
MNEMONIC
operand
opcode
cycles
MNEMONIC
operand
opcode
cycles
HALT
00
7
NOP
20
4
ADD A,expr
data
01
4
INC A
acc
21
4
ADD A,[expr]
direct
02
6
INC X
x
22
4
ADD A,[X+expr]
index
03
7
INC [expr]
direct
23
7
ADC A,expr
data
04
4
INC [X+expr]
index
24
8
ADC A,[expr]
direct
05
6
DEC A
acc
25
4
ADC A,[X+expr]
index
06
7
DEC X
x
26
4
SUB A,expr
data
07
4
DEC [expr]
direct
27
7
SUB A,[expr]
direct
08
6
DEC [X+expr]
index
28
8
SUB A,[X+expr]
index
09
7
IORD expr
address
29
5
SBB A,expr
data
0A
4
IOWR expr
address
2A
5
SBB A,[expr]
direct
0B
6
POP A
2B
4
SBB A,[X+expr]
index
0C
7
POP X
2C
4
OR A,expr
data
0D
4
PUSH A
2D
5
Table 4-2. I/O Register Summary (continued)
Register Name
I/O Address
Read/Write
Function
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