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CY7C65013-PVC bảng dữ liệu(PDF) 7 Page - Cypress Semiconductor

tên linh kiện CY7C65013-PVC
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CY7C65013
CY7C65113
Document #: 38-08002 Rev. *B
Page 7 of 51
2.0
Functional Overview
The CY7C65x13 devices are one-time programmable 8-bit microcontrollers with a built-in 12-Mbps USB hub that supports up to
seven downstream ports. The microcontroller instruction set has been optimized specifically for USB operations, although the
microcontrollers can be used for a variety of non-USB embedded applications.
GPIO
CY7C65013
The CY7C65013 features 22 GPIO pins to support USB and other applications. The I/O pins are grouped into four ports (P0[7:0],
P1[7:4,2:0], P2[7:3], P3[1:0]) where each port can be configured as inputs with internal pull-ups, open drain outputs, or traditional
CMOS outputs. Ports 0 to 2 are rated at 7 mA per pin (typical) sink current. Port 3 pins are rated at 12 mA per pin (typical) sink
current, which allows these pins to drive LEDs. Multiple GPIO pins can be connected together to drive a single output for more
drive current capacity. Additionally, each I/O pin can be used to generate a GPIO interrupt to the microcontroller. All of the GPIO
interrupts all share the same “GPIO” interrupt vector.
CY7C65113
The CY7C65113 has 11 GPIO pins (P0[7:0], P1[2:0]), both rated at 7 mA per pin (typical) sink current. Multiple GPIO pins can
be connected together to drive a single output for more drive current capacity.
Clock
The microcontroller uses an external 6-MHz crystal and an internal oscillator to provide a reference to an internal phase-locked
loop (PLL)-based clock generator. This technology allows the customer application to use an inexpensive 6-MHz fundamental
crystal that reduces the clock-related noise emissions (EMI). A PLL clock generator provides the 6-, 12-, and 48-MHz clock signals
for distribution within the microcontroller.
Memory
The CY7C65013 and the CY7C65113 are offered with 8 KB of PROM.
Power-on Reset, Watchdog, and Free-running Timer
These parts include power-on reset logic, a Watchdog timer, and a 12-bit free-running timer. The POR logic detects when power
is applied to the device, resets the logic to a known state, and begins executing instructions at PROM address 0x0000. The
Watchdog timer is used to ensure the microcontroller recovers after a period of inactivity. The firmware may become inactive for
a variety of reasons, including errors in the code or a hardware failure such as waiting for an interrupt that never occurs.
I2C
The microcontroller can communicate with external electronics through the GPIO pins. An I2C-compatible interface accommo-
dates a 100-kHz serial link with an external device.
Timer
The free-running 12-bit timer clocked at 1 MHz provides two interrupt sources, 128-
µs and 1.024-ms. The timer can be used to
measure the duration of an event under firmware control by reading the timer at the start of the event and after the event is
complete. The difference between the two readings indicates the duration of the event in microseconds. The upper four bits of
the timer are latched into an internal register when the firmware reads the lower eight bits. A read from the upper four bits actually
reads data from the internal register, instead of the timer. This feature eliminates the need for firmware to try to compensate if the
upper four bits increment immediately after the lower eight bits are read.
Interrupts
The microcontroller supports ten maskable interrupts in the vectored interrupt controller. Interrupt sources include the USB Bus
Reset interrupt, the 128-
µs (bit 6) and 1.024-ms (bit 9) outputs from the free-running timer, five USB endpoints, the USB hub, the
GPIO ports, and the I2C-compatible master mode interface. The timer bits cause an interrupt (if enabled) when the bit toggles
from LOW ‘0’ to HIGH ‘1’. The USB endpoints interrupt after the USB host has written data to the endpoint FIFO or after the USB
controller sends a packet to the USB host. The GPIO ports also have a level of masking to select which GPIO inputs can cause
a GPIO interrupt. Input transition polarity can be programmed for each GPIO port as part of the port configuration. The interrupt
polarity can be rising edge (‘0’ to ‘1’) or falling edge (‘1’ to ‘0’).
USB
The CY7C65013 and CY7C65113 include an integrated USB Serial Interface Engine (SIE) that supports the integrated periph-
erals and the hub controller function. The hardware supports up to two USB device addresses with one device address for the
hub (two endpoints) and a device address for a compound device (three endpoints). The SIE allows the USB host to communicate
with the hub and functions integrated into the microcontroller. The CY7C65113 part includes a 1:4 hub repeater with one upstream
port and four downstream ports, while the CY7C65013 part includes a 1:7 hub repeater. The USB Hub allows power management
control of the downstream ports by using GPIO pins assigned by the user firmware. The user has the option of ganging the
downstream ports together with a single pair of power management pins, or providing power management for each port with four
(CY7C65113) or seven (CY7C65013) pairs of power management pins.



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