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MC9S08DZ96F2CLL bảng dữ liệu(PDF) 167 Page - Freescale Semiconductor, Inc |
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MC9S08DZ96F2CLL bảng dữ liệu(HTML) 167 Page - Freescale Semiconductor, Inc |
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167 / 458 page ![]() Chapter 8 Multi-Purpose Clock Generator (S08MCGV2) MC9S08DZ128 Series Data Sheet, Rev. 1 Freescale Semiconductor 167 8.1.1 Features Key features of the MCG module are: • Frequency-locked loop (FLL) — Internal or external reference can be used to control the FLL • Phase-locked loop (PLL) — Voltage-controlled oscillator (VCO) — Modulo VCO frequency divider — Phase/Frequency detector — Integrated loop filter — Lock detector with interrupt capability • Internal reference clock — Nine trim bits for accuracy — Can be selected as the clock source for the MCU • External reference clock — Control for external oscillator — Clock monitor with reset capability — Can be selected as the clock source for the MCU • Reference divider is provided • Clock source selected can be divided down by 1, 2, 4, or 8 • BDC clock (MCGLCLK) is provided as a constant divide by 2 of the DCO output whether in an FLL or PLL mode. • Two selectable digitally controlled oscillators (DCOs) optimized for different frequency ranges. • Option to maximize DCO output frequency for a 32,768 Hz external reference clock source. |
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