MC9S08DZ96F2CLL datasheet(160/458 Pages) FREESCALE

160 / 458 page

Chapter 7 Central Processor Unit (S08CPUV5)

MC9S08DZ128 Series Data Sheet, Rev. 1

160

Freescale Semiconductor

SUB #opr8i

SUB opr8a

SUB opr16a

SUB oprx16,X

SUB oprx8,X

SUB ,X

SUB oprx16,SP

SUB

oprx8,SP

Subtract

← (A) – (M)

IMM

DIR

EXT

IX2

IX1

SP2

SP1

9E D0

9E E0

hh ll

ee ff

rpp

prpp

rpp

rfp

pprpp

prpp

↕ 11 –

–

↕ ↕ ↕

SWI

Software Interrupt

← (PC) + $0001

Push (PCL); SP

← (SP) – $0001

Push (PCH); SP

← (SP) – $0001

Push (X); SP

← (SP) – $0001

Push (A); SP

← (SP) – $0001

Push (CCR); SP

← (SP) – $0001

← 1;

PCH

← Interrupt Vector High Byte

PCL

← Interrupt Vector Low Byte

INH

sssssvvfppp

–11–

1–––

TAP

Transfer Accumulator to CCR

CCR

← (A)

INH

↕ 11 ↕

↕ ↕ ↕ ↕

TAX

Transfer Accumulator to X (Index Register

Low)

← (A)

INH

–11–

––––

TPA

Transfer CCR to Accumulator

← (CCR)

INH

–11–

––––

TST opr8a

TSTA

TSTX

TST oprx8,X

TST ,X

TST oprx8,SP

Test for Negative or Zero

(M) – $00

(A) – $00

(X) – $00

(M) – $00

DIR

INH

IX1

SP1

9E 6D

rfpp

rfp

prfpp

011–

–

↕ ↕ –

TSX

Transfer SP to Index Reg.

H:X

← (SP) + $0001

INH

–11–

––––

TXA

Transfer X (Index Reg. Low) to Accumulator

← (X)

INH

–11–

––––

Table 7-2. Instruction Set Summary (Sheet 8 of 9)

Source

Form

Operation

Object Code

Cyc-by-Cyc

Details

Affect

on CCR

V 1 1 H

I N Z C

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