AT90SCR100 datasheet(217/433 Pages) ATMEL

217 / 433 page

217

TPR0327AY–SMS–30Jan09

AT90SCR100

Figure 17-10.

USB Host Controller Pipe Interrupt System

17.6.1

Idle and Power-Down

The CPU exits from Idle and Power-Down mode with any USB Interrupts.

17.7

USB Host Controller Registers

17.7.1

UHCR - USB Host Control Register

• Bit 7 - UHEN : USB Host Enable

Set this bit to enable the USB Host Controller. This will connect CC4 and CC8 to USB Host block

output signals.

Clear this bit to disable USB Host controller and reconnect CC4 and CC8 pads to standard

SmartCard Interface Block pads.

• Bit 6..5 - PAD1..0 : Pad Type

These bits switch the D+/D- of the USB Host Controller outputs to specific pads as follow:

• 00 : Pad electrically compliant to USB 2.0 (USB Host pads)

• 01 : Pad electrically compliant to USB-IC (SCIB pads)

• Others : Reserved for future use

FLERRE

UPIEN.7

UNDERFI

UPSTAX.5

OVERFI

UPSTAX.6

NAKEDI

UPINTX.6

NAKEDE

UPIEN.6

PERRI

UPINTX.4

PERRE

UPIEN.4

TXSTPI

UPINTX.3

TXSTPE

UPIEN.3

TXOUTI

UPINTX.2

TXOUTE

UPIEN.2

RXSTALLI

UPINTX.1

RXSTALLE

UPIEN.1

RXINI

UPINTX.0

RXINE

UPIEN.0

FLERRE

UPIEN.7

PIPE 0

PIPE 1

PIPE 2

PIPE 3

USB Host

Pipe Interrupt

Bit

4321

$009E

UHEN

PAD [1..0]

FRZCLK

RESUME

RESET

SOFEN

UHCR

Read/write

R/W

Initial value

1000

0x00

AT90SCR100 bảng dữ liệu(PDF) 217 Page - ATMEL Corporation

AT90SCR100 bảng dữ liệu(HTML) 217 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL