APEX20KC datasheet(87/90 Pages) ALTERA

87 / 90 page

Altera Corporation

APEX 20KC Programmable Logic Device Data Sheet

SRAM configuration elements allow APEX 20KC devices to be

reconfigured in-circuit by loading new configuration data into the device.

Real-time reconfiguration is performed by forcing the device into

command mode with a device pin, loading different configuration data,

reinitializing the device, and resuming user-mode operation. In-field

upgrades can be performed by distributing new configuration files.

Configuration Schemes

The configuration data for an APEX 20KC device can be loaded with one

of five configuration schemes (see Table 70), chosen on the basis of the

target application. An EPC16, EPC2, or EPC1 configuration device,

intelligent controller, or the JTAG port can be used to control the

configuration of an APEX 20KC device. When a configuration device is

used, the system can configure automatically at system power-up.

Multiple APEX 20KC devices can be configured in any of five

configuration schemes by connecting the configuration enable (nCE) and

configuration enable output (nCEO) pins on each device.

f For more information on configuration, see Application Note 116

(Configuring SRAM-Based LUT Devices).

Device Pin-

Outs

See the Altera web site (http://www.altera.com) or the Altera Digital

Library

for pin-out information.

Ordering

Information

Figure 39 describes the ordering codes for Stratix devices. For more

information on a specific package, refer to the Altera Device Package

Information Data Sheet.

Table 70. Data Sources for Configuration

Configuration Scheme

Data Source

Configuration device

EPC16, EPC8, EPC4, EPC2, or EPC1 configuration device

Passive serial (PS)

MasterBlaster or ByteBlasterMV download cable or serial data source

Passive parallel asynchronous (PPA)

Parallel data source

Passive parallel synchronous (PPS)

Parallel data source

JTAG

MasterBlaster or ByteBlasterMV download cable or a microprocessor

with a Jam Standard Test and Programming Language (STAPL) or

JBC File

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