ADC34RF72 datasheet(20/74 Pages) TI2

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7.3 Feature Description

7.3.1 Analog Inputs

The analog inputs of the ADC32RF72 have internal buffers which isolate the sampling capacitor from the

external input circuitry. The analog inputs have a programmable, differential split termination with internal biasing

as shown in Figure 7-1. The differential termination can be selected to differential 50Ω, 100Ω or 200Ω via SPI

INxP/N

ADC

VCM

25/50/100

Ω

25/50/100

Ω

Figure 7-1. Analog input (internal) circuitry

The following parameters can be programmed:

Table 7-1. Input Termination Programming (x = 0,1,2,3)

System Parameter Name

Size

(bits)

Default

Reset

Description

ADC{x}_INPUT_TERM_SEL

R/W

Select ADC{x} input termination setting

0: 50Ω differential

1: 100Ω differential

2: 200Ω differential

7.3.1.1 Input Bandwidth

The input bandwidth (-3dB) with internal 50Ω, 100Ω and 200Ω differential termination is shown in Figure 7-2

along with the S11 responses (Figure 7-2). With 100Ω termination the input bandwidth is approximately 1.8GHz

(-3dB). Figure 7-4 shows the frequency response with 100Ω termination using the external matching network

shown in Figure 7-5.

Input Frequency (MHz)

100

1000

4000

-10

-9

-8

-7

-6

-5

-4

-3

-2

-1

50ohm

100ohm

200ohm

Figure 7-2. Input Bandwidth Plot (6dB pad)

Frequency (GHz)

0.3

0.6

0.9

1.2

1.5

1.8

2.1

2.4

2.7

-35

-30

-25

-20

-15

-10

-5

50ohm

100ohm

200ohm

Figure 7-3. S11 vs Frequency (each normalized to

input termination)

ADC32RF72

SBASAL2 – NOVEMBER 2025

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