S75WS256NDFBAWMB datasheet(152/216 Pages) SPANSION

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S75WS256Nxx Based MCPs

S75WS-N-00_A0 February 17, 2005

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Inf o rmation

29.2 Page Mode Read Operation

Page mode is a performance-enhancing extension to the legacy asynchronous Read operation. In

page mode-capable products, an initial asynchronous Read access is performed, then adjacent

addresses can be Read quickly by simply changing the low-order address. Addresses A[3:0] are

used to determine the members of the 16-address CellularRAM page. Addresses A[4] and higher

must remain fixed during the entire page mode access. Figure 29.3 shows the timing for a page

mode access. Page mode takes advantage of the fact that adjacent addresses can be Read in a

shorter period of time than random addresses. Write operations do not include comparable page

mode functionality.

During asynchronous page mode operation, the CLK input must be held Low. CE# must be driven

High upon completion of a page mode access. Wait will be driven while the device is enabled and

its state should be ignored. Page mode is enabled by setting RCR[7] to High. Write operations do

not include comparable page mode functionality. ADV must be driven Low during all page mode

Read accesses.

Figure 29.2 Write Operation (ADV# Low)

Data Valid

Address Valid

tWC = WRITE Cycle Time

CE#

OE#

WE#

ADDRESS

DATA

LB#/UB#

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