S75WS256NDFBAWMB datasheet(34/216 Pages) SPANSION

34 / 216 page

S75WS256Nxx Based MCPs

S75WS-N-00_A0 February 17, 2005

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Inf o rmation

8.5

Program/Erase Operations

These devices are capable of several modes of programming and or erase operations which are

described in detail in the following sections. However, prior to any programming and or erase op-

eration, devices must be setup appropriately as outlined in the configuration register (Table 8.8).

For any program and or erase operations, including writing command sequences, the system

must drive AVD# and CE# to VIL, and OE# to VIH when providing an address to the device, and

drive WE# and CE# to VIL, and OE# to VIH when writing commands or programming data.

Addresses are latched on the last falling edge of WE# or CE#, while data is latched on the 1st

rising edge of WE# or CE#.

Note the following:

When the Embedded Program algorithm is complete, the device returns to the read mode.

The system can determine the status of the program operation by using DQ7 or DQ6. Refer

to the Write Operation Status section for information on these status bits.

A 0 cannot be programmed back to a 1. Attempting to do so causes the device to set DQ5 = 1

(halting any further operation and requiring a reset command). A succeeding read shows that

the data is still 0. Only erase operations can convert a 0 to a 1.

Any commands written to the device during the Embedded Program Algorithm are ignored

except the Program Suspend command.

Secured Silicon Sector, Autoselect, and CFI functions are unavailable when a program oper-

ation is in progress.

A hardware reset immediately terminates the program operation and the program command

sequence should be reinitiated once the device has returned to the read mode, to ensure data

integrity.

Programming is allowed in any sequence and across sector boundaries for single word pro-

gramming operation.

8.5.1

Single Word Programming

Single word programming mode is the simplest method of programming. In this mode, four Flash

command write cycles are used to program an individual Flash address. The data for this pro-

gramming operation could be 8-, 16- or 32-bits wide. While this method is supported by all

Spansion devices, in general it is not recommended for devices that support Write Buffer Pro-

gramming. See Table 13.1 for the required bus cycles and Figure 8.3 for the flowchart.

When the Embedded Program algorithm is complete, the device then returns to the read mode

and addresses are no longer latched. The system can determine the status of the program oper-

ation by using DQ7 or DQ6. Refer to the Write Operation Status section for information on these

status bits.

During programming, any command (except the Suspend Program command) is ignored.

The Secured Silicon Sector, Autoselect, and CFI functions are unavailable when a program op-

eration is in progress.

A hardware reset immediately terminates the program operation. The program command se-

quence should be reinitiated once the device has returned to the read mode, to ensure data

integrity.

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